[llvm-commits] [PATCH] PowerPC: Expand load extend vector operations
Adhemerval Zanella
azanella at linux.vnet.ibm.com
Mon Nov 5 05:22:25 PST 2012
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for
vector types when Altivec is enabled. This patch avoid llvm on PPC with
altivec enbled to fail with expand code like:
define <8 x i16> @v8si16_sext_in_reg(<8 x i16> %a) {
%b = trunc <8 x i16> %a to <8 x i8>
%c = sext <8 x i8> %b to <8 x i16>
ret <8 x i16> %c
}
Testcase included and tested on X86_64 and PPC64. Any comments, tips,
advices?
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