[llvm-commits] [llvm] r167315 - in /llvm/trunk: lib/Target/Mips/MipsRegisterInfo.td test/CodeGen/Mips/largeimm1.ll test/CodeGen/Mips/largeimmprinting.ll test/CodeGen/Mips/longbranch.ll
Michael Gottesman
mgottesman at apple.com
Fri Nov 2 15:08:28 PDT 2012
I am getting test failures for
LLVM :: MC/Disassembler/Mips/mips64.txt
LLVM :: MC/Disassembler/Mips/mips64_le.txt
LLVM :: MC/Disassembler/Mips/mips64r2.txt
LLVM :: MC/Disassembler/Mips/mips64r2_le.txt
from this commit even on builds that ran after your text case fix in 167322. The specific error messages are:
------
MC/Disassembler/Mips/mips64.txt
# CHECK: daddu $26, $at, $11
^
<stdin>:3:2: note: scanning from here
daddu $26, $1, $11
------
MC/Disassembler/Mips/mips64_le.txt
# CHECK: daddu $26, $at, $11
^
<stdin>:3:2: note: scanning from here
daddu $26, $1, $11
^
------
MC/Disassembler/Mips/mips64r2.txt
# CHECK: daddu $26, $at, $11
^
<stdin>:3:2: note: scanning from here
daddu $26, $1, $11
------
MC/Disassembler/Mips/mips64r2_le.txt
# CHECK: daddu $26, $at, $11
^
<stdin>:3:2: note: scanning from here
daddu $26, $1, $11
^
------
This revision has not hit the public darwin builders yet, so I imagine it is going to break the build soon.
On Nov 2, 2012, at 2:26 PM, Akira Hatanaka <ahatanaka at mips.com> wrote:
> Author: ahatanak
> Date: Fri Nov 2 16:26:03 2012
> New Revision: 167315
>
> URL: http://llvm.org/viewvc/llvm-project?rev=167315&view=rev
> Log:
> [mips] Use register number instead of name to print register $AT.
>
>
> Modified:
> llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td
> llvm/trunk/test/CodeGen/Mips/largeimm1.ll
> llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll
> llvm/trunk/test/CodeGen/Mips/longbranch.ll
>
> Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=167315&r1=167314&r2=167315&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original)
> +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Fri Nov 2 16:26:03 2012
> @@ -73,7 +73,7 @@
> let Namespace = "Mips" in {
> // General Purpose Registers
> def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]>;
> - def AT : MipsGPRReg< 1, "at">, DwarfRegNum<[1]>;
> + def AT : MipsGPRReg< 1, "1">, DwarfRegNum<[1]>;
> def V0 : MipsGPRReg< 2, "2">, DwarfRegNum<[2]>;
> def V1 : MipsGPRReg< 3, "3">, DwarfRegNum<[3]>;
> def A0 : MipsGPRReg< 4, "4">, DwarfRegNum<[4]>;
> @@ -107,7 +107,7 @@
>
> // General Purpose 64-bit Registers
> def ZERO_64 : Mips64GPRReg< 0, "zero", [ZERO]>, DwarfRegNum<[0]>;
> - def AT_64 : Mips64GPRReg< 1, "at", [AT]>, DwarfRegNum<[1]>;
> + def AT_64 : Mips64GPRReg< 1, "1", [AT]>, DwarfRegNum<[1]>;
> def V0_64 : Mips64GPRReg< 2, "2", [V0]>, DwarfRegNum<[2]>;
> def V1_64 : Mips64GPRReg< 3, "3", [V1]>, DwarfRegNum<[3]>;
> def A0_64 : Mips64GPRReg< 4, "4", [A0]>, DwarfRegNum<[4]>;
>
> Modified: llvm/trunk/test/CodeGen/Mips/largeimm1.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/largeimm1.ll?rev=167315&r1=167314&r2=167315&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Mips/largeimm1.ll (original)
> +++ llvm/trunk/test/CodeGen/Mips/largeimm1.ll Fri Nov 2 16:26:03 2012
> @@ -1,7 +1,7 @@
> ; RUN: llc -march=mipsel < %s | FileCheck %s
>
> -; CHECK: lui $at, 49152
> -; CHECK: lui $at, 16384
> +; CHECK: lui ${{[0-9]+}}, 49152
> +; CHECK: lui ${{[0-9]+}}, 16384
> define void @f() nounwind {
> entry:
> %a1 = alloca [1073741824 x i8], align 1
>
> Modified: llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll?rev=167315&r1=167314&r2=167315&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll (original)
> +++ llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll Fri Nov 2 16:26:03 2012
> @@ -6,9 +6,9 @@
>
> define void @f() nounwind {
> entry:
> -; CHECK: lui $at, 65535
> -; CHECK: addiu $at, $at, -16
> -; CHECK: addu $sp, $sp, $at
> +; CHECK: lui $[[R0:[0-9]+]], 65535
> +; CHECK: addiu $[[R0]], $[[R0]], -16
> +; CHECK: addu $sp, $sp, $[[R0]]
>
> %agg.tmp = alloca %struct.S1, align 1
> %tmp = getelementptr inbounds %struct.S1* %agg.tmp, i32 0, i32 0, i32 0
>
> Modified: llvm/trunk/test/CodeGen/Mips/longbranch.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/longbranch.ll?rev=167315&r1=167314&r2=167315&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Mips/longbranch.ll (original)
> +++ llvm/trunk/test/CodeGen/Mips/longbranch.ll Fri Nov 2 16:26:03 2012
> @@ -6,15 +6,15 @@
> define void @foo1(i32 %s) nounwind {
> entry:
> ; O32: bal
> -; O32: lui $at, 0
> -; O32: addiu $at, $at, {{[0-9]+}}
> -; N64: lui $at, 0
> -; N64: daddiu $at, $at, 0
> -; N64: dsll $at, $at, 16
> -; N64: daddiu $at, $at, 0
> +; O32: lui $1, 0
> +; O32: addiu $1, $1, {{[0-9]+}}
> +; N64: lui $1, 0
> +; N64: daddiu $1, $1, 0
> +; N64: dsll $1, $1, 16
> +; N64: daddiu $1, $1, 0
> ; N64: bal
> -; N64: dsll $at, $at, 16
> -; N64: daddiu $at, $at, {{[0-9]+}}
> +; N64: dsll $1, $1, 16
> +; N64: daddiu $1, $1, {{[0-9]+}}
>
> %tobool = icmp eq i32 %s, 0
> br i1 %tobool, label %if.end, label %if.then
>
>
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