[llvm-commits] [llvm] r167051 - in /llvm/trunk: lib/Transforms/Scalar/SROA.cpp test/Transforms/SROA/vector-promotion.ll

Chandler Carruth chandlerc at gmail.com
Tue Oct 30 13:52:40 PDT 2012


Author: chandlerc
Date: Tue Oct 30 15:52:40 2012
New Revision: 167051

URL: http://llvm.org/viewvc/llvm-project?rev=167051&view=rev
Log:
Fix PR14212: For some strange reason I treated vectors differently from
integers in that the code to handle split alloca-wide integer loads or
stores doesn't come first. It should, for the same reasons as with
integers, and the PR attests to that. Also had to fix a busted assert in
that this test case also covers.

Modified:
    llvm/trunk/lib/Transforms/Scalar/SROA.cpp
    llvm/trunk/test/Transforms/SROA/vector-promotion.ll

Modified: llvm/trunk/lib/Transforms/Scalar/SROA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SROA.cpp?rev=167051&r1=167050&r2=167051&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SROA.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SROA.cpp Tue Oct 30 15:52:40 2012
@@ -2490,9 +2490,6 @@
     assert(OldOp == OldPtr);
     IRBuilder<> IRB(&LI);
 
-    if (VecTy)
-      return rewriteVectorizedLoadInst(IRB, LI, OldOp);
-
     uint64_t Size = EndOffset - BeginOffset;
     if (Size < TD.getTypeStoreSize(LI.getType())) {
       assert(!LI.isVolatile());
@@ -2502,7 +2499,7 @@
              TD.getTypeStoreSizeInBits(LI.getType()) &&
              "Non-byte-multiple bit width");
       assert(LI.getType()->getIntegerBitWidth() ==
-             TD.getTypeSizeInBits(OldAI.getAllocatedType()) &&
+             TD.getTypeAllocSizeInBits(OldAI.getAllocatedType()) &&
              "Only alloca-wide loads can be split and recomposed");
       IntegerType *NarrowTy = Type::getIntNTy(LI.getContext(), Size * 8);
       bool IsConvertable = (BeginOffset - NewAllocaBeginOffset == 0) &&
@@ -2536,6 +2533,8 @@
       return IsConvertable;
     }
 
+    if (VecTy)
+      return rewriteVectorizedLoadInst(IRB, LI, OldOp);
     if (IntTy && LI.getType()->isIntegerTy())
       return rewriteIntegerLoad(IRB, LI);
 

Modified: llvm/trunk/test/Transforms/SROA/vector-promotion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SROA/vector-promotion.ll?rev=167051&r1=167050&r2=167051&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/SROA/vector-promotion.ll (original)
+++ llvm/trunk/test/Transforms/SROA/vector-promotion.ll Tue Oct 30 15:52:40 2012
@@ -205,3 +205,18 @@
   %res = load i64* %addr, align 4
   ret i64 %res
 }
+
+define i32 @PR14212() {
+; CHECK: @PR14212
+; This caused a crash when "splitting" the load of the i32 in order to promote
+; the store of <3 x i8> properly. Heavily reduced from an OpenCL test case.
+entry:
+  %retval = alloca <3 x i8>, align 4
+; CHECK-NOT: alloca
+
+  store <3 x i8> undef, <3 x i8>* %retval, align 4
+  %cast = bitcast <3 x i8>* %retval to i32*
+  %load = load i32* %cast, align 4
+  ret i32 %load
+; CHECK: ret i32
+}





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