[llvm-commits] [llvm] r166770 - /llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
Rafael EspĂndola
rafael.espindola at gmail.com
Fri Oct 26 06:03:40 PDT 2012
This needs a testcase.
On 26 October 2012 08:09, Adhemerval Zanella
<azanella at linux.vnet.ibm.com> wrote:
> Author: azanella
> Date: Fri Oct 26 07:09:58 2012
> New Revision: 166770
>
> URL: http://llvm.org/viewvc/llvm-project?rev=166770&view=rev
> Log:
> PowerPC: Fix for rldcl/rldicl/rldicr MC emission
>
> This patch fixes the rldcl/rldicl/rldicr instruction emission. The issue is
> the MDForm_1 instruction defines the PowerISA MB field from 'rldicl'
> with the name MBE, but RLDCL/RLDICL/RLDICR definition uses as 'MB'.
>
> It end up by generatint the 'rldicl' enconding at
> 'lib/Target/PowerPC/PPCGenMCCodeEmitter.inc' to use the fourth argument as the
> third. The patch changes it by adjusting to use the fourth argument as
> intended.
>
> Fixes PR14180.
>
>
> Modified:
> llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=166770&r1=166769&r2=166770&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Fri Oct 26 07:09:58 2012
> @@ -494,16 +494,16 @@
>
> // Rotate instructions.
> def RLDCL : MDForm_1<30, 0,
> - (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MB),
> - "rldcl $rA, $rS, $rB, $MB", IntRotateD,
> + (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MBE),
> + "rldcl $rA, $rS, $rB, $MBE", IntRotateD,
> []>, isPPC64;
> def RLDICL : MDForm_1<30, 0,
> - (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MB),
> - "rldicl $rA, $rS, $SH, $MB", IntRotateDI,
> + (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MBE),
> + "rldicl $rA, $rS, $SH, $MBE", IntRotateDI,
> []>, isPPC64;
> def RLDICR : MDForm_1<30, 1,
> - (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$ME),
> - "rldicr $rA, $rS, $SH, $ME", IntRotateDI,
> + (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MBE),
> + "rldicr $rA, $rS, $SH, $MBE", IntRotateDI,
> []>, isPPC64;
>
> def RLWINM8 : MForm_2<21,
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list