[llvm-commits] [llvm] r166699 - in /llvm/trunk/test/CodeGen/X86: atom-shuf.ll vec_shuffle-26.ll widen_cast-1.ll
Michael Liao
michael.liao at intel.com
Thu Oct 25 10:50:06 PDT 2012
Author: hliao
Date: Thu Oct 25 12:50:05 2012
New Revision: 166699
URL: http://llvm.org/viewvc/llvm-project?rev=166699&view=rev
Log:
Add test for ATOM ISA SSSE3
- Remove SSE4.1 feature in other ATOM-based test cases
Added:
llvm/trunk/test/CodeGen/X86/atom-shuf.ll
Modified:
llvm/trunk/test/CodeGen/X86/vec_shuffle-26.ll
llvm/trunk/test/CodeGen/X86/widen_cast-1.ll
Added: llvm/trunk/test/CodeGen/X86/atom-shuf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atom-shuf.ll?rev=166699&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atom-shuf.ll (added)
+++ llvm/trunk/test/CodeGen/X86/atom-shuf.ll Thu Oct 25 12:50:05 2012
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=atom | FileCheck %s
+
+define <16 x i8> @foo(<16 x i8> %in) {
+ %r = shufflevector <16 x i8> %in, <16 x i8> undef, <16 x i32> < i32 7, i32 3, i32 2, i32 11, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ ret <16 x i8> %r
+; CHECK: foo
+; CHECK: pshufb
+; CHECK-NEXT: ret
+}
Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-26.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-26.ll?rev=166699&r1=166698&r2=166699&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-26.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-26.ll Thu Oct 25 12:50:05 2012
@@ -1,5 +1,5 @@
; RUN: llc < %s -march=x86 -mcpu=generic -mattr=sse41 | FileCheck %s
-; RUN: llc < %s -march=x86 -mcpu=atom -mattr=+sse41 | FileCheck -check-prefix=ATOM %s
+; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck -check-prefix=ATOM %s
; Transpose example using the more generic vector shuffle. Return float8
; instead of float16
@@ -47,8 +47,8 @@
; CHECK: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
; ATOM: lo_hi_shift
; ATOM: movhps ([[BASEREG:%[a-z]+]]),
-; ATOM: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
-; ATOM: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
+; ATOM: movd %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
+; ATOM: movd %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
%v.i = bitcast float* %y to <4 x float>*
%0 = load <4 x float>* %v.i, align 1
%1 = bitcast float* %x to <1 x i64>*
Modified: llvm/trunk/test/CodeGen/X86/widen_cast-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_cast-1.ll?rev=166699&r1=166698&r2=166699&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_cast-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_cast-1.ll Thu Oct 25 12:50:05 2012
@@ -1,5 +1,5 @@
; RUN: llc -march=x86 -mcpu=generic -mattr=+sse42 < %s | FileCheck %s
-; RUN: llc -march=x86 -mcpu=atom -mattr=+sse42 < %s | FileCheck -check-prefix=ATOM %s
+; RUN: llc -march=x86 -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
; CHECK: paddd
; CHECK: movl
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