[llvm-commits] [PATCH] TableGen backend support to express relations between instruction

[Jyotsna Verma]

Hello Jakob,

This patch addresses all your comments. Please let me know if it's good to
commit.

Thanks,
Jyotsna
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> -----Original Message-----
> From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk]
> Sent: Friday, October 19, 2012 7:03 PM
> To: Jyotsna Verma
> Cc: 'Sean Silva'; llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm-commits] [PATCH] TableGen backend support to express
> relations between instruction
> 
> 
> On Oct 19, 2012, at 9:32 AM, Jyotsna Verma <jverma at codeaurora.org>
> wrote:
> 
> > <0001-Add-TableGen-support-to-create-relationship-maps-bet.patch>
> 
> --- a/utils/TableGen/TableGen.cpp
> +++ b/utils/TableGen/TableGen.cpp
> @@ -102,6 +102,7 @@ bool LLVMTableGenMain(raw_ostream &OS,
> RecordKeeper &Records) {
>      break;
>    case GenInstrInfo:
>      EmitInstrInfo(Records, OS);
> +    EmitMapTable(Records, OS);
>      break;
>    case GenCallingConv:
>      EmitCallingConv(Records, OS);
> 
> Please add this call inside EmitInstrInfo.
> 
> +  OS << "uint16_t "<<InstrMapDesc.getName();  // Number of columns in
> + the table are NumCol+1 because key instructions are  // emitted as
> + first column.
> +  OS << "Table[]["<< NumCol+1 << "] = {\n";
> 
> Const tables, please.
> 
> +  OS << "int16_t "<< InstrMapDesc.getName() << "(uint16_t Opcode";
> 
> Opcodes are in the range 0-64K. They  won't fit in an int16_t.
> 
> /jakob

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