[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

[Jakob Stoklund Olesen]

On Oct 18, 2012, at 12:11 PM, Weiming Zhao <weimingz at codeaurora.org> wrote:

> Hi Jakob,
> 
> Attached is the patch of adding GPRPair Reg class in ARM.
> The GPR pair uses R0-SP (r13), all of the registers supported by
> ldrexd/strexd instruction.
> Then, the Paird Regs that contain reserved GPRs are set as reserved as well.
> It also supports copyPhysReg, loadRegFromStackSlot, and
> storeRegToStackSlot().
> 
> Unit testing at this stage is difficult because the intrinsic that use the
> ldrexd/strexd will copy_reg from/to the GPRpair, so the live range of the
> GPRPair is very short and hard to force the RA to spill them. And since the
> patch won't affect the current functionality of LLVM, we can test it when
> subsequent fixes come in.
> 
> Please help to review the patch.

Hi Weiming,

This basically looks good with some small changes.

I would suggest you omit the changes in ARMAsmPrinter for now.

+      MCSuperRegIterator SR(MO.getReg(), TRI);
+      unsigned Reg = TRI->getSubReg(*SR, ARM::gsub_1);

Don't tacitly assume that there is exactly one super-register. That is very fragile.

You should also make it clear that the register class only has odd-even register pairs, not all consecutive pairs as your comments are suggesting now.

/jakob