[llvm-commits] [llvm] r166122 - in /llvm/trunk: include/llvm/CodeGen/SchedulerRegistry.h lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h

[Evan Cheng]

On Oct 17, 2012, at 12:50 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:

> 
> On Oct 17, 2012, at 12:39 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> 
>> Author: evancheng
>> Date: Wed Oct 17 14:39:36 2012
>> New Revision: 166122
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=166122&view=rev
>> Log:
>> Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use
>> any scheduling heuristics nor does it build up any scheduling data structure
>> that other heuristics use. It essentially linearize by doing a DFA walk but
>> it does handle glues correctly.
>> 
>> IMPORTANT: it probably can't handle all the physical register dependencies so
>> it's not suitable for x86. It also doesn't deal with dbg_value nodes right now
>> so it's definitely is still WIP.
>> 
>> rdar://12474515
> 
> Any chance this could preserve source order?

It's not designed to do a good job of it. To preserve source order it will have to switch off pure DFS order. It can do a slightly better job by visiting operands in source order but that's about it.

This is really meant to be a very quick DAG linearization followed by MI scheduling for non-O0 cases. For -O0 case it might be ok if SDISel fallback is not used much. I can see it being useful for a target like ARM once we add code to deal with dbg_value nodes.

Evan

> 
> /jakob
>