[llvm-commits] [llvm] r165802 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp test/CodeGen/PowerPC/2012-10-12-bitcast.ll

[NAKAMURA Takumi]

Ulrich, llc doesn't assume altivec on generic host. Please reconfirm my r165803.

...Takumi

2012/10/13 Ulrich Weigand <ulrich.weigand at de.ibm.com>:
> Author: uweigand
> Date: Fri Oct 12 10:42:58 2012
> New Revision: 165802
>
> URL: http://llvm.org/viewvc/llvm-project?rev=165802&view=rev
> Log:
> Fix big-endian codegen bug in DAGTypeLegalizer::ExpandRes_BITCAST
>
> On PowerPC, a bitcast of <16 x i8> to i128 may run through a code
> path in ExpandRes_BITCAST that attempts to do an intermediate
> bitcast to a <4 x i32> vector, and then construct the Hi and Lo parts
> of the resulting i128 by pairing up two of those i32 vector elements
> each.  The code already recognizes that on a big-endian system, the
> first two vector elements form the Hi part, and the final two vector
> elements form the Lo part (vice-versa from the little-endian situation).
>
> However, we also need to take endianness into account when forming each
> of those separate pairs:  on a big-endian system, vector element 0 is
> the *high* part of the pair making up the Hi part of the result, and
> vector element 1 is the low part of the pair.  The code currently always
> uses vector element 0 as the low part and vector element 1 as the high
> part, as is appropriate for little-endian platforms only.
>
> This patch fixes this by swapping the vector elements as they are
> paired up as appropriate.
>
>
> Added:
>     llvm/trunk/test/CodeGen/PowerPC/2012-10-12-bitcast.ll
> Modified:
>     llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp?rev=165802&r1=165801&r2=165802&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp Fri Oct 12 10:42:58 2012
> @@ -124,6 +124,10 @@
>          // there are only two nodes left, i.e. Lo and Hi.
>          SDValue LHS = Vals[Slot];
>          SDValue RHS = Vals[Slot + 1];
> +
> +        if (TLI.isBigEndian())
> +          std::swap(LHS, RHS);
> +
>          Vals.push_back(DAG.getNode(ISD::BUILD_PAIR, dl,
>                                     EVT::getIntegerVT(
>                                       *DAG.getContext(),
>
> Added: llvm/trunk/test/CodeGen/PowerPC/2012-10-12-bitcast.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2012-10-12-bitcast.ll?rev=165802&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/2012-10-12-bitcast.ll (added)
> +++ llvm/trunk/test/CodeGen/PowerPC/2012-10-12-bitcast.ll Fri Oct 12 10:42:58 2012
> @@ -0,0 +1,20 @@
> +; RUN: llc < %s | FileCheck %s
> +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
> +target triple = "powerpc64-unknown-linux-gnu"
> +
> +define i32 @test(<16 x i8> %v) nounwind {
> +entry:
> +  %0 = bitcast <16 x i8> %v to i128
> +  %1 = lshr i128 %0, 96
> +  %2 = trunc i128 %1 to i32
> +  ret i32 %2
> +}
> +
> +; Verify that bitcast handles big-endian platforms correctly
> +; by checking we load the result from the correct offset
> +
> +; CHECK: addi [[REGISTER:[0-9]+]], 1, -16
> +; CHECK: stvx 2, 0, [[REGISTER]]
> +; CHECK: lwz 3, -16(1)
> +; CHECK: blr
> +
>
>
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