[llvm-commits] [llvm] r165721 - in /llvm/trunk: lib/CodeGen/MachineTraceMetrics.cpp lib/CodeGen/MachineTraceMetrics.h test/CodeGen/X86/early-ifcvt-crash.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Thu Oct 11 09:46:08 PDT 2012
Author: stoklund
Date: Thu Oct 11 11:46:07 2012
New Revision: 165721
URL: http://llvm.org/viewvc/llvm-project?rev=165721&view=rev
Log:
Pass an explicit operand number to addLiveIns.
Not all instructions define a virtual register in their first operand.
Specifically, INLINEASM has a different format.
<rdar://problem/12472811>
Added:
llvm/trunk/test/CodeGen/X86/early-ifcvt-crash.ll
Modified:
llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp
llvm/trunk/lib/CodeGen/MachineTraceMetrics.h
Modified: llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp?rev=165721&r1=165720&r2=165721&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp Thu Oct 11 11:46:07 2012
@@ -850,14 +850,14 @@
return false;
}
-/// Assuming that DefMI was used by Trace.back(), add it to the live-in lists
-/// of all the blocks in Trace. Stop when reaching the block that contains
-/// DefMI.
+/// Assuming that the virtual register defined by DefMI:DefOp was used by
+/// Trace.back(), add it to the live-in lists of all the blocks in Trace. Stop
+/// when reaching the block that contains DefMI.
void MachineTraceMetrics::Ensemble::
-addLiveIns(const MachineInstr *DefMI,
+addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
ArrayRef<const MachineBasicBlock*> Trace) {
assert(!Trace.empty() && "Trace should contain at least one block");
- unsigned Reg = DefMI->getOperand(0).getReg();
+ unsigned Reg = DefMI->getOperand(DefOp).getReg();
assert(TargetRegisterInfo::isVirtualRegister(Reg));
const MachineBasicBlock *DefMBB = DefMI->getParent();
@@ -950,7 +950,7 @@
DEBUG(dbgs() << "pred\t" << Height << '\t' << *PHI);
if (pushDepHeight(Deps.front(), PHI, Height,
Heights, MTM.SchedModel, MTM.TII))
- addLiveIns(Deps.front().DefMI, Stack);
+ addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
}
}
}
@@ -983,7 +983,7 @@
// Update the required height of any virtual registers read by MI.
for (unsigned i = 0, e = Deps.size(); i != e; ++i)
if (pushDepHeight(Deps[i], MI, Cycle, Heights, MTM.SchedModel, MTM.TII))
- addLiveIns(Deps[i].DefMI, Stack);
+ addLiveIns(Deps[i].DefMI, Deps[i].DefOp, Stack);
InstrCycles &MICycles = Cycles[MI];
MICycles.Height = Cycle;
Modified: llvm/trunk/lib/CodeGen/MachineTraceMetrics.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineTraceMetrics.h?rev=165721&r1=165720&r2=165721&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineTraceMetrics.h (original)
+++ llvm/trunk/lib/CodeGen/MachineTraceMetrics.h Thu Oct 11 11:46:07 2012
@@ -279,7 +279,7 @@
unsigned computeCrossBlockCriticalPath(const TraceBlockInfo&);
void computeInstrDepths(const MachineBasicBlock*);
void computeInstrHeights(const MachineBasicBlock*);
- void addLiveIns(const MachineInstr *DefMI,
+ void addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
ArrayRef<const MachineBasicBlock*> Trace);
protected:
Added: llvm/trunk/test/CodeGen/X86/early-ifcvt-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/early-ifcvt-crash.ll?rev=165721&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/early-ifcvt-crash.ll (added)
+++ llvm/trunk/test/CodeGen/X86/early-ifcvt-crash.ll Thu Oct 11 11:46:07 2012
@@ -0,0 +1,32 @@
+; RUN: llc < %s -x86-early-ifcvt -verify-machineinstrs
+; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs
+;
+; Run these tests with and without -stress-early-ifcvt to exercise heuristics.
+;
+target triple = "x86_64-apple-macosx10.8.0"
+
+; MachineTraceMetrics::Ensemble::addLiveIns crashes because the first operand
+; on an inline asm instruction is not a vreg def.
+; <rdar://problem/12472811>
+define void @f1() nounwind {
+entry:
+ br i1 undef, label %if.then6.i, label %if.end.i
+
+if.then6.i:
+ br label %if.end.i
+
+if.end.i:
+ br i1 undef, label %if.end25.i, label %if.else17.i
+
+if.else17.i:
+ %shl24.i = shl i32 undef, undef
+ br label %if.end25.i
+
+if.end25.i:
+ %storemerge31.i = phi i32 [ %shl24.i, %if.else17.i ], [ 0, %if.end.i ]
+ store i32 %storemerge31.i, i32* undef, align 4
+ %0 = tail call i32 asm sideeffect "", "=r,r,i,i"(i32 undef, i32 15, i32 1) nounwind
+ %conv = trunc i32 %0 to i8
+ store i8 %conv, i8* undef, align 1
+ unreachable
+}
More information about the llvm-commits
mailing list