[llvm-commits] [llvm] r165434 - in /llvm/trunk: lib/CodeGen/MachineTraceMetrics.cpp lib/CodeGen/MachineTraceMetrics.h test/CodeGen/X86/early-ifcvt.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Mon Oct 8 15:06:44 PDT 2012
Author: stoklund
Date: Mon Oct 8 17:06:44 2012
New Revision: 165434
URL: http://llvm.org/viewvc/llvm-project?rev=165434&view=rev
Log:
Don't crash on extra evil irreducible control flow.
When the CFG contains a loop with multiple entry blocks, the traces
computed by MachineTraceMetrics don't always have the same nice
properties. Loop back-edges are normally excluded from traces, but
MachineLoopInfo doesn't recognize loops with multiple entry blocks, so
those back-edges may be included.
Avoid asserting when that happens by adding an isEarlierInSameTrace()
function that accurately determines if a dominating block is part of the
same trace AND is above the currrent block in the trace.
Modified:
llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp
llvm/trunk/lib/CodeGen/MachineTraceMetrics.h
llvm/trunk/test/CodeGen/X86/early-ifcvt.ll
Modified: llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp?rev=165434&r1=165433&r2=165434&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp Mon Oct 8 17:06:44 2012
@@ -677,7 +677,7 @@
const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
// Ignore dependencies outside the current trace.
const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()];
- if (!DefTBI.hasValidDepth() || DefTBI.Head != TBI.Head)
+ if (!DefTBI.isEarlierInSameTrace(TBI))
continue;
unsigned Len = LIR.Height + Cycles[DefMI].Depth;
MaxLen = std::max(MaxLen, Len);
@@ -740,7 +740,7 @@
const TraceBlockInfo&DepTBI =
BlockInfo[Dep.DefMI->getParent()->getNumber()];
// Ignore dependencies from outside the current trace.
- if (!DepTBI.hasValidDepth() || DepTBI.Head != TBI.Head)
+ if (!DepTBI.isEarlierInSameTrace(TBI))
continue;
assert(DepTBI.HasValidInstrDepths && "Inconsistent dependency");
unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
Modified: llvm/trunk/lib/CodeGen/MachineTraceMetrics.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineTraceMetrics.h?rev=165434&r1=165433&r2=165434&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineTraceMetrics.h (original)
+++ llvm/trunk/lib/CodeGen/MachineTraceMetrics.h Mon Oct 8 17:06:44 2012
@@ -165,6 +165,14 @@
/// Invalidate height resources when a block below this one has changed.
void invalidateHeight() { InstrHeight = ~0u; HasValidInstrHeights = false; }
+ /// Determine if this block belongs to the same trace as TBI and comes
+ /// before it in the trace.
+ /// Also returns true when TBI == this.
+ bool isEarlierInSameTrace(const TraceBlockInfo &TBI) const {
+ return hasValidDepth() && TBI.hasValidDepth() &&
+ Head == TBI.Head && InstrDepth <= TBI.InstrDepth;
+ }
+
// Data-dependency-related information. Per-instruction depth and height
// are computed from data dependencies in the current trace, using
// itinerary data.
Modified: llvm/trunk/test/CodeGen/X86/early-ifcvt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/early-ifcvt.ll?rev=165434&r1=165433&r2=165434&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/early-ifcvt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/early-ifcvt.ll Mon Oct 8 17:06:44 2012
@@ -67,3 +67,78 @@
}
declare void @fprintf(...) nounwind
+
+; CHECK: BZ2_decompress
+; This test case contains irreducible control flow, so MachineLoopInfo doesn't
+; recognize the cycle in the CFG. This would confuse MachineTraceMetrics.
+define void @BZ2_decompress(i8* %s) nounwind ssp {
+entry:
+ switch i32 undef, label %sw.default [
+ i32 39, label %if.end.sw.bb2050_crit_edge
+ i32 36, label %sw.bb1788
+ i32 37, label %if.end.sw.bb1855_crit_edge
+ i32 40, label %sw.bb2409
+ i32 38, label %sw.bb1983
+ i32 44, label %if.end.sw.bb3058_crit_edge
+ ]
+
+if.end.sw.bb3058_crit_edge: ; preds = %entry
+ br label %save_state_and_return
+
+if.end.sw.bb1855_crit_edge: ; preds = %entry
+ br label %save_state_and_return
+
+if.end.sw.bb2050_crit_edge: ; preds = %entry
+ br label %sw.bb2050
+
+sw.bb1788: ; preds = %entry
+ br label %save_state_and_return
+
+sw.bb1983: ; preds = %entry
+ br i1 undef, label %save_state_and_return, label %if.then1990
+
+if.then1990: ; preds = %sw.bb1983
+ br label %while.body2038
+
+while.body2038: ; preds = %sw.bb2050, %if.then1990
+ %groupPos.8 = phi i32 [ 0, %if.then1990 ], [ %groupPos.9, %sw.bb2050 ]
+ br i1 undef, label %save_state_and_return, label %if.end2042
+
+if.end2042: ; preds = %while.body2038
+ br i1 undef, label %if.end2048, label %while.end2104
+
+if.end2048: ; preds = %if.end2042
+ %bsLive2054.pre = getelementptr inbounds i8* %s, i32 8
+ br label %sw.bb2050
+
+sw.bb2050: ; preds = %if.end2048, %if.end.sw.bb2050_crit_edge
+ %groupPos.9 = phi i32 [ 0, %if.end.sw.bb2050_crit_edge ], [ %groupPos.8, %if.end2048 ]
+ %and2064 = and i32 undef, 1
+ br label %while.body2038
+
+while.end2104: ; preds = %if.end2042
+ br i1 undef, label %save_state_and_return, label %if.end2117
+
+if.end2117: ; preds = %while.end2104
+ br i1 undef, label %while.body2161.lr.ph, label %while.body2145.lr.ph
+
+while.body2145.lr.ph: ; preds = %if.end2117
+ br label %save_state_and_return
+
+while.body2161.lr.ph: ; preds = %if.end2117
+ br label %save_state_and_return
+
+sw.bb2409: ; preds = %entry
+ br label %save_state_and_return
+
+sw.default: ; preds = %entry
+ call void @BZ2_bz__AssertH__fail() nounwind
+ br label %save_state_and_return
+
+save_state_and_return:
+ %groupPos.14 = phi i32 [ 0, %sw.default ], [ %groupPos.8, %while.body2038 ], [ %groupPos.8, %while.end2104 ], [ 0, %if.end.sw.bb3058_crit_edge ], [ 0, %if.end.sw.bb1855_crit_edge ], [ %groupPos.8, %while.body2161.lr.ph ], [ %groupPos.8, %while.body2145.lr.ph ], [ 0, %sw.bb2409 ], [ 0, %sw.bb1788 ], [ 0, %sw.bb1983 ]
+ store i32 %groupPos.14, i32* undef, align 4
+ ret void
+}
+
+declare void @BZ2_bz__AssertH__fail()
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