[llvm-commits] LDRB_POST_IMM crash

[Silviu Baranga]

Hi Stepan,

The test needs some CHECK lines or else it will not pass.
I suggest checking that the ldrb instruction was actually
generated.

Some minor issues:
The patch has trailing CRs.

+; Check that LDRB_POST_IMM instruction emitted properly.
Should be "Check that the LDRB_POST_IMM instruction was emitted
properly."

Otherwise, the fix looks fine from my point of view.

Cheers,
Silviu

> -----Original Message-----
> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
> bounces at cs.uiuc.edu] On Behalf Of Stepan Dyatkovskiy
> Sent: 08 October 2012 16:15
> To: llvm-commits
> Subject: Re: [llvm-commits] LDRB_POST_IMM crash
> 
> ping.
> Stepan Dyatkovskiy wrote:
> > Hi all!
> >
> > SDNode for LDRB_POST_IMM is invalid: number of registers added to
> SDNode
> > fewer that described in .td.
> >
> > 7 ops is needed, but SDNode with only 6 is created. For fast
> comparison,
> > you can look in generated code ARMGenInstrInfo.inc. At LDRB_POST_IMM
> > description and its OperandInfo52.
> >
> > In more details:
> > In ARMInstrInfo.td, in multiclass AI2_ldridx, in definition
> _POST_IMM,
> > offset operand is defined as am2offset_imm. am2offset_imm is complex
> > parameter type, and actually it consists from dummy register and imm
> > itself. As I understood trick with dummy reg was made for AsmParser.
> In
> > ARMISelLowering.cpp, this dummy register was not added to SDNode, and
> it
> > cause crash in Peephole Optimizer pass.
> >
> > Please find the patch in attachment.
> >
> > -Stepan.
> 
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