[llvm-commits] [PATCH] Prevent the mixing of S and D registers for vsqrt/vdiv instructions on A15

[Silviu Baranga]

Hi Tim,

Thanks for catching the bug!
I've added the NEON-specific PseudoInst and PseudoExpand
classes in ARMInstrFormat.td and made sure that the instruction
size is now specified.

-- Silviu

> -----Original Message-----
> From: Tim Northover [mailto:t.p.northover at gmail.com]
> Sent: 28 September 2012 16:38
> To: Silviu Baranga
> Cc: Jim Grosbach; llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm-commits] [PATCH] Prevent the mixing of S and D
> registers for vsqrt/vdiv instructions on A15
> 
> Hi Silviu,
> 
> > It turns out that the PseudoInst can be expanded using only
> > TableGen definitions. I've updated the patch and attached it.
> 
> I'm afraid this one probably causes issues in the ARMConstantIsland
> pass. The problem is that the Size field is left at the default, which
> means that GetInstSizeInBytes in ARMBaseInstrInfo.cpp returns 0. I
> think this means the ConstantIslandPass could miscalculate whether a
> constant island is within range.
> 
> Sorry.
> 
> Tim.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: sqrt_div_neonfp_a15.diff
Type: application/octet-stream
Size: 5073 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20120928/93a63708/attachment.obj>