[llvm-commits] [llvm] r164673 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/mulx32.ll test/CodeGen/X86/mulx64.ll

NAKAMURA Takumi geek4civic at gmail.com
Wed Sep 26 02:31:37 PDT 2012


2012/9/26 Michael Liao <michael.liao at intel.com>:
> Author: hliao
> Date: Wed Sep 26 03:22:37 2012
> New Revision: 164673
>
> URL: http://llvm.org/viewvc/llvm-project?rev=164673&view=rev
> Log:
> Add MULX code generation support

> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mulx32.ll?rev=164673&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/mulx32.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/mulx32.ll Wed Sep 26 03:22:37 2012
> @@ -0,0 +1,22 @@
> +; RUN: llc -mcpu=core-avx2 -march=x86 < %s | FileCheck %s
> +
> +define i64 @f1(i32 %a, i32 %b) {
> +  %x = zext i32 %a to i64
> +  %y = zext i32 %b to i64
> +  %r = mul i64 %x, %y
> +; CHECK: f1
> +; CHECK: mulxl
> +; CHECK: ret
> +  ret i64 %r
> +}
> +
> +define i64 @f2(i32 %a, i32* %p) {
> +  %b = load i32* %p
> +  %x = zext i32 %a to i64
> +  %y = zext i32 %b to i64
> +  %r = mul i64 %x, %y
> +; CHECK: f1

f1 hits ".size   f1, .Ltmp0-f1". Emissions of pecoff don't have one.
Fixed in r164681.



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