[llvm-commits] [PATCH] Use vld1/vst1 for unaligned load/store

Evan Cheng evan.cheng at apple.com
Mon Sep 24 13:57:40 PDT 2012


Thanks Stepan. However, I have questions about this patch:

       } else {                                                                                                                                                                                                                                      
+        const TargetRegisterClass *TRCnopc =                                                                                                                                                                                                        
+            (const TargetRegisterClass*)&ARM::GPRnopcRegClass;                                                                                                                                                                                      
+                                                                                                                                                                                                                                                    
         AddDefaultPred(BuildMI(*BB, MI, dl,                                                                                                                                                                                                         
           TII->get(ldrOpc),scratch)                                                                                                                                                                                                                 
-          .addReg(srcOut, RegState::Define).addReg(srcIn).addImm(1));                                                                                                                                                                               
+          .addReg(srcOut, RegState::Define).addReg(srcIn)                                                                                                                                                                                           
+          .addReg(0).addImm(1));                                                                                                                                                                                                                    
                                                                                                                                                                                                                                                     
         AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(strOpc), destOut)                                                                                                                                                                              
           .addReg(scratch).addReg(destIn)

1. TRCnopc is not used at all?
2. What is ldrOpc is not a VLD1 opcode?

Evan

On Sep 23, 2012, at 1:58 PM, Stepan Dyatkovskiy <STPWORLD at narod.ru> wrote:

> Guys, due to crashes described in PR13790, consider next fix for VLD1/VST1 nodes generation. If I'm get right VLD1 nodes need one more dummy GPR.
> -Stepan.
> David Tweed wrote:
>> On Sep 20, 2012, at 8:36 AM, David Tweed <david.tweed at arm.com
>> <mailto:david.tweed at arm.com>> wrote:
>> 
>> 
>> 
>> Just a note to say that this commit is causing 3 tests in the regression
>> suite to fail on ARM/Linux
>> 
>> test/CodeGen/ARM/twoaddrinstr.ll
>> 
>> test/CodeGen/ARM/reg_sequence.ll
>> 
>> test/CodeGen/ARM/vbsl-constant.ll
>> 
>> Can you try again after my r164320 commit?
>> 
>> With that commit the tests now pass. Thanks for dealing with the issue.
>> 
>> Regards,
>> 
>> David
>> 
>> 
>> 
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>> 
> 
> <vld1_vst1.patch>




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