[llvm-commits] [PATCH, RFC] Fix PR13891 (AliasChain not properly maintained in ScheduleDAGInstrs::buildSchedGraph())

[William J. Schmidt]

PR13891 identifies a test case where a load and store that reference the
same memory location may be improperly interchanged.  Investigation
showed this was due to a lost aliasing dependence.  If the only
dependence between two instructions is a may-alias via the AliasChain,
that dependence may be missed because the head of the AliasChain is not
always properly updated.  This patch fixes that.

There was one regression failure in test/CodeGen/ARM/vstlane.ll.  I
found that the code gen was identical before and after the patch, modulo
one change in assigned registers.  I modified the test to be less
dogmatic about which register is assigned in this case.

test/CodeGen/PowerPC/pr13891.ll is a new test that verifies the fix.

No additional regressions in llvm/tests or in llvm/projects/test-suite.
Is this OK to commit?

Thanks,
Bill

-- 
Bill Schmidt, Ph.D.
IBM Advance Toolchain for PowerLinux
IBM Linux Technology Center
wschmidt at linux.vnet.ibm.com
wschmidt at us.ibm.com

-------------- next part --------------
A non-text attachment was scrubbed...
Name: pr13891-2012-09-21a.patch
Type: text/x-patch
Size: 3058 bytes
Desc: 
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20120921/01160511/attachment.bin>