[llvm-commits] [PATCH] Prevent the mixing of S and D registers for vsqrt/vdiv instructions on A15

[Silviu Baranga]

Ping.

> -----Original Message-----
> From: Silviu Baranga [mailto:silbar01 at arm.com]
> Sent: 14 September 2012 14:17
> To: llvm-commits at cs.uiuc.edu
> Subject: [PATCH] Prevent the mixing of S and D registers for vsqrt/vdiv
> instructions on A15
> 
> Hi,
> 
> The attached patch prevents the mixing of D and S registers for
> vsqrt/vdiv
> instructions when using neonfp on A15. This is necessary since single
> precision math instructions use D registers when using neonfp, and
> there
> are no equivalent instructions for vsqrt and vdiv.
> 
> This is achieved by using a vdup instruction on the super D register of
> the output S register. Our benchmarks show that this solution is only
> profitable for A15.
> 
> Please review.
> 
> Thanks,
> Silviu