[llvm-commits] [FIX+regression-test] PR13617: LLVM+Clang emits movw instrucionts with -march=armv6zk

[Stepan Dyatkovskiy]

Thanks )
-Stepan.
Evan Cheng wrote:
> Sorry, I completely missed your patch. I've just commit the exact same fix (r164169).
>
> Evan
>
> On Sep 10, 2012, at 12:54 AM, Stepan Dyatkovskiy <STPWORLD at narod.ru> wrote:
>
>> ping, patch link:
>> http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20120907/0ad12de5/attachment.bin
>> Stepan Dyatkovskiy wrote:
>>> Reattached.
>>> -Stepan.
>>> Bill Wendling wrote:
>>>> ENOPATCH.
>>>>
>>>> -bw
>>>>
>>>> On Sep 5, 2012, at 3:13 AM, Stepan Dyatkovskiy <STPWORLD at narod.ru> wrote:
>>>>
>>>>> ping.
>>>>> Stepan Dyatkovskiy wrote:
>>>>>> ping...
>>>>>> Stepan Dyatkovskiy wrote:
>>>>>>> ping.
>>>>>>> Stepan Dyatkovskiy wrote:
>>>>>>>> Hi all!
>>>>>>>>
>>>>>>>> The bug is fired when dag-to-dag isel meets 'add' instruction with
>>>>>>>> second operand that is negative number less than -256. E.g.:
>>>>>>>> add %var, -1000
>>>>>>>>
>>>>>>>> ARM dag-to-dag instruction selector matches the pattern that emits
>>>>>>>> (sub %var (MOVi16 Rd, 1000))
>>>>>>>>
>>>>>>>> After fast TableGen learning, I found that it ignores instruction
>>>>>>>> predicates for patterns (ARMPat, ARMV6Pat and so on) while generating
>>>>>>>> MatcherTable. So it ignores restrictions defined for MOVi16
>>>>>>>> instruction
>>>>>>>> (ARMv6t2 and higher).
>>>>>>>>
>>>>>>>> I also found that for several patterns this behaviour compensated by
>>>>>>>> adding 'Requires' predicate explicitly. So, I did the same in this
>>>>>>>> patch. Please find the patch in attachment for review.
>>>>>>>>
>>>>>>>> -Stepan.
>>>>>>>
>>>>>>
>>>>>
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