[llvm-commits] [llvm] r164169 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll test/CodeGen/ARM/sub.ll

[Evan Cheng]

Author: evancheng
Date: Tue Sep 18 16:24:16 2012
New Revision: 164169

URL: http://llvm.org/viewvc/llvm-project?rev=164169&view=rev
Log:
MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648

Added:
    llvm/trunk/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/test/CodeGen/ARM/sub.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=164169&r1=164168&r2=164169&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Sep 18 16:24:16 2012
@@ -3092,9 +3092,11 @@
              (SUBSri  GPR:$src, so_imm_neg:$imm)>;
 
 def : ARMPat<(add     GPR:$src, imm0_65535_neg:$imm),
-             (SUBrr   GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>;
+             (SUBrr   GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>,
+             Requires<[IsARM, HasV6T2]>;
 def : ARMPat<(ARMaddc GPR:$src, imm0_65535_neg:$imm),
-             (SUBSrr  GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>;
+             (SUBSrr  GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>,
+             Requires<[IsARM, HasV6T2]>;
 
 // The with-carry-in form matches bitwise not instead of the negation.
 // Effectively, the inverse interpretation of the carry flag already accounts

Added: llvm/trunk/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll?rev=164169&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll Tue Sep 18 16:24:16 2012
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mcpu=arm7tdmi | FileCheck %s
+
+; movw is only legal for V6T2 and later.
+; rdar://12300648
+
+define i32 @t(i32 %x) {
+; CHECK: t:
+; CHECK-NOT: movw
+  %tmp = add i32 %x, -65535
+  ret i32 %tmp
+}

Modified: llvm/trunk/test/CodeGen/ARM/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sub.ll?rev=164169&r1=164168&r2=164169&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sub.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/sub.ll Tue Sep 18 16:24:16 2012
@@ -1,4 +1,4 @@
-; RUN: llc -march=arm < %s | FileCheck %s
+; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s
 
 ; 171 = 0x000000ab
 define i64 @f1(i64 %a) {