[llvm-commits] [llvm] r163984 - in /llvm/trunk: include/llvm/ADT/EquivalenceClasses.h include/llvm/Support/Registry.h utils/TableGen/AsmMatcherEmitter.cpp
Dmitri Gribenko
gribozavr at gmail.com
Sat Sep 15 13:22:05 PDT 2012
Author: gribozavr
Date: Sat Sep 15 15:22:05 2012
New Revision: 163984
URL: http://llvm.org/viewvc/llvm-project?rev=163984&view=rev
Log:
Fix Doxygen issues: wrap code examples in \code and use \p to refer to
parameters.
Modified:
llvm/trunk/include/llvm/ADT/EquivalenceClasses.h
llvm/trunk/include/llvm/Support/Registry.h
llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
Modified: llvm/trunk/include/llvm/ADT/EquivalenceClasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/EquivalenceClasses.h?rev=163984&r1=163983&r2=163984&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/EquivalenceClasses.h (original)
+++ llvm/trunk/include/llvm/ADT/EquivalenceClasses.h Sat Sep 15 15:22:05 2012
@@ -33,6 +33,7 @@
///
/// Here is a simple example using integers:
///
+/// \code
/// EquivalenceClasses<int> EC;
/// EC.unionSets(1, 2); // insert 1, 2 into the same set
/// EC.insert(4); EC.insert(5); // insert 4, 5 into own sets
@@ -46,6 +47,7 @@
/// cerr << *MI << " "; // Print member.
/// cerr << "\n"; // Finish set.
/// }
+/// \endcode
///
/// This example prints:
/// 4
Modified: llvm/trunk/include/llvm/Support/Registry.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Registry.h?rev=163984&r1=163983&r2=163984&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/Registry.h (original)
+++ llvm/trunk/include/llvm/Support/Registry.h Sat Sep 15 15:22:05 2012
@@ -120,6 +120,7 @@
/// Abstract base class for registry listeners, which are informed when new
/// entries are added to the registry. Simply subclass and instantiate:
///
+ /// \code
/// class CollectorPrinter : public Registry<Collector>::listener {
/// protected:
/// void registered(const Registry<Collector>::entry &e) {
@@ -131,7 +132,7 @@
/// };
///
/// CollectorPrinter Printer;
- ///
+ /// \endcode
class listener {
listener *Prev, *Next;
Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=163984&r1=163983&r2=163984&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Sat Sep 15 15:22:05 2012
@@ -199,7 +199,7 @@
return Kind >= UserClass0;
}
- /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
+ /// isRelatedTo - Check whether this class is "related" to \p RHS. Classes
/// are related if they are in the same class hierarchy.
bool isRelatedTo(const ClassInfo &RHS) const {
// Tokens are only related to tokens.
@@ -238,7 +238,7 @@
return Root == RHSRoot;
}
- /// isSubsetOf - Test whether this class is a subset of \arg RHS;
+ /// isSubsetOf - Test whether this class is a subset of \p RHS.
bool isSubsetOf(const ClassInfo &RHS) const {
// This is a subset of RHS if it is the same class...
if (this == &RHS)
@@ -501,7 +501,7 @@
}
/// couldMatchAmbiguouslyWith - Check whether this matchable could
- /// ambiguously match the same set of operands as \arg RHS (without being a
+ /// ambiguously match the same set of operands as \p RHS (without being a
/// strictly superior match).
bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) {
// The primary comparator is the instruction mnemonic.
@@ -2064,7 +2064,7 @@
static void emitIsSubclass(CodeGenTarget &Target,
std::vector<ClassInfo*> &Infos,
raw_ostream &OS) {
- OS << "/// isSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
+ OS << "/// isSubclass - Compute whether \\p A is a subclass of \\p B.\n";
OS << "static bool isSubclass(MatchClassKind A, MatchClassKind B) {\n";
OS << " if (A == B)\n";
OS << " return true;\n\n";
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