[llvm-commits] [PATCH 2/2] fix issues similar to PR11334
Michael Liao
michael.liao at intel.com
Mon Sep 10 09:16:03 PDT 2012
On Mon, 2012-09-10 at 10:26 +0300, Nadav Rotem wrote:
> Hi Michael,
>
> Like I wrote before, I still think that the handling of FP_ROUND and FP_EXT should happen as a DAGCombine before type-legalization. It is pretty easy to detect FP_ROUND and FP_EXT before they are being scalarized, but after scalarization you need lots of code to reassemble them.
>
Hi Nadav
You concern is fair. But, if we do that as early as in
before-type-legalization, optimizations on fp-trunc and fp-ext in DAG
combination won't have chance to optimize them as they don't understand
target-specific ISDs.
Yours
- Michael
> Thanks,
> Nadav
>
>
> On Sep 6, 2012, at 1:00 AM, Michael Liao <michael.liao at intel.com> wrote:
>
> > Ping.
> >
> > Thanks for review
> > - Michael
> >
> > On Thu, 2012-08-30 at 10:49 -0700, Michael Liao wrote:
> >> Patch is rebased after UseSSE commit. Thanks for your review!
> >>
> >> Yours
> >> - Michael
> >>
> >> On Tue, 2012-08-28 at 00:20 -0700, Michael Liao wrote:
> >>> Ping...
> >>>
> >>> Thanks
> >>> - Michael
> >>>
> >>> On Sat, 2012-08-18 at 21:16 -0700, Michael Liao wrote:
> >>>> Ping again.
> >>>>
> >>>> Yours
> >>>> - Michael
> >>>>
> >>>> On Thu, 2012-08-16 at 10:48 -0700, Michael Liao wrote:
> >>>>> revised again with special case (all operands in BUILD_VECTOR are
> >>>>> undefined.).
> >>>>>
> >>>>> Yours
> >>>>> - Michael
> >>>>>
> >>>>> On Wed, 2012-08-15 at 09:51 -0700, Michael Liao wrote:
> >>>>>> Here is a revised patch reducing FP_ROUND DAG combination overhead.
> >>>>>>
> >>>>>> Yours
> >>>>>> - Michael
> >>>>>>
> >>>>>> On Tue, 2012-08-14 at 15:32 -0700, Michael Liao wrote:
> >>>>>>> Hi
> >>>>>>>
> >>>>>>> Here're two patches fixing issues similar to but not the exactly same as
> >>>>>>> PR11334. The second part fixes FPROUND from f64 vector to f32 vector.
> >>>>>>> This patches add a lowering helper for BUILD_VECTOR to recognize the
> >>>>>>> scalarized pattern due to FPROUND requires matching elements. A lower
> >>>>>>> overhead DAG combination of FPROUND is added as well to handle a special
> >>>>>>> case (v2f64 -> v2f32) in AVX, where it's converted to v4f64 -> v4f32
> >>>>>>> after type legalization and, instead of vcvtpd2ps, use vcvtpd2psy and
> >>>>>>> unnecessary 256-bit vector registers. Tests are added/revised as well.
> >>>>>>>
> >>>>>>> Yours
> >>>>>>> - Michael
> >>>>>>>
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