[llvm-commits] [PATCH] Shufflevector crash on ARM, take 2
Stepan Dyatkovskiy
stpworld at narod.ru
Mon Sep 10 07:13:05 PDT 2012
Yup! I forgot about getAnyExtOrTrunc. Is is much more better than I
proposed in last posts of previous thread.
Though I think that in DAGCombiner it is ok, if we doing
v8i8 concat_vectors v4i16, v4i16
Then items will truncated implicitly. But we must forbid nodes like this:
v16i8 concat_vectors v4i16, v4i16.
So I think, that here we can allow different element types and even
*any* input and output bit width. The only thing we should control is
sizes of input and output vectors. So I propose to use this check:
if (VecIn1.getValueType().getVectorNumElements()*2 !=
VT.getVectorNumElements())
return SDValue();
-Stepan
James Molloy wrote:
> Hi,
>
> A while back I posted a patch to fix a crash codegenning certain
> shufflevectors on ARM. The initial fix was fine, but it exposed a
> followup bug which I was unable to fix in a good way.
>
> With Duncan and Nadav's input, I now attach a patch that fixes a bug
> with incorrectly converting VECTOR_SHUFFLES to CONCAT_VECTORS, and a
> followup of SelectionDAG::getNode() returning a TRUNCATE node to an
> illegal type.
>
> This patch has been half reviewed before and has been sitting around
> without review (from Stepan) for a while, so a review would be very much
> appreciated! :)
>
> Cheers,
>
> James
>
>
>
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