[llvm-commits] [llvm] r163323 - in /llvm/trunk: lib/Target/ARM/Disassembler/ARMDisassembler.cpp test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt
Tim Northover
Tim.Northover at arm.com
Thu Sep 6 08:27:12 PDT 2012
Author: tnorthover
Date: Thu Sep 6 10:27:12 2012
New Revision: 163323
URL: http://llvm.org/viewvc/llvm-project?rev=163323&view=rev
Log:
Diagnose invalid alignments on duplicating VLDn instructions.
Patch by Chris Lidbury.
Added:
llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt (with props)
Modified:
llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt
Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=163323&r1=163322&r2=163323&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Thu Sep 6 10:27:12 2012
@@ -2701,6 +2701,8 @@
unsigned align = fieldFromInstruction(Insn, 4, 1);
unsigned size = fieldFromInstruction(Insn, 6, 2);
+ if (size == 0 && align == 1)
+ return MCDisassembler::Fail;
align *= (1 << size);
switch (Inst.getOpcode()) {
@@ -2831,6 +2833,8 @@
unsigned align = fieldFromInstruction(Insn, 4, 1);
if (size == 0x3) {
+ if (align == 0)
+ return MCDisassembler::Fail;
size = 4;
align = 16;
} else {
Modified: llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt?rev=163323&r1=163322&r2=163323&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt Thu Sep 6 10:27:12 2012
@@ -1,5 +1,4 @@
-# RUN: llvm-mc --disassemble %s -triple=armv7-unknown-unknwon -mcpu=cortex-a8 2>&1 | grep "invalid instruction encoding"
-# XFAIL: *
+# RUN: llvm-mc --disassemble %s -triple=armv7-unknown-unknwon -mcpu=cortex-a8 2>&1 | FileCheck %s
# Opcode=737 Name=VLD1DUPq8_UPD Format=ARM_FORMAT_NLdSt(30)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
@@ -9,3 +8,4 @@
#
# 'a' == 1 and data_size == 8 is invalid
0x3d 0x3c 0xa0 0xf4
+# CHECK: invalid instruction encoding
Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt?rev=163323&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt Thu Sep 6 10:27:12 2012
@@ -0,0 +1,4 @@
+# RUN: llvm-mc -triple thumbv7 -show-encoding -disassemble < %s 2>&1 | FileCheck %s
+
+0xa0 0xf9 0xc0 0x0f
+# CHECK: invalid instruction encoding
Propchange: llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt
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svn:eol-style = native
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