[llvm-commits] Fix the AND dag node folding

[Eli Friedman]

On Thu, Aug 30, 2012 at 3:45 AM, Silviu Baranga <silbar01 at arm.com> wrote:
> Hi Eli,
>
>> +          Constant &=
>> SplatValue.lshr(i*BitWidthSrc).zextOrTrunc(BitWidthSrc);
>>
>> I don't follow what you're doing here: the splat value is computed
>> relative to the BUILD_VECTOR, and is completely unrelated to the width
>> of the original load.
> Good catch. There is a bug in that statement, and it should have been:
> "Constant &= SplatValue.lshr(i*BitWidthDst).zextOrTrunc(BitWidthSrc);"
> to be correct.
>
> However, it turns out that it doesn't matter if we use the load type
> size there or not since we will zextOrTrunc the constant to the
> load type lane size anyway further down the code path. Therefore,
> I've removed any references to the load node from the changes.
>
> I've attached an updated patch.

What happens if SplatBitSize is less than BitWidth?

Otherwise, looks fine.

-Eli