[llvm-commits] [llvm] r162725 - in /llvm/trunk: lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/PowerPC/PPCISelLowering.h lib/Target/PowerPC/PPCInstrInfo.td test/CodeGen/PowerPC/cr1eq-no-extra-moves.ll

[Tobias von Koch]

Hal,

Whoops sorry can't believe I never hit that bug. Fix is attached.

What's happening here is that the CR6SET/CR6UNSET is breaking the chain 
of register copies glued to the function call (BL_SVR4 node). The 
scheduler then moves other instructions in between those and the 
function call, which isn't good!

Tobias

On 29/08/2012 18:36, Hal Finkel wrote:
> Tobias,
>
> Will you be able to fix this soon, or should I revert while you work on
> it?
>
>   -Hal
>
> On Wed, 29 Aug 2012 20:29:44 +0900
> NAKAMURA Takumi <geek4civic at gmail.com> wrote:
>
>> Hal and Tobias,
>>
>> It has triggered one failure on ppc-linux (ps3, f12).
>>
>> Failing Tests (1):
>>      LLVM :: CodeGen/Generic/2003-07-29-BadConstSbyte.ll
>>
>> http://bb.pgr.jp/builders/clang-ppc-linux
>>
>> I won't reproduce to add triple to the test on x86_64-linux host.
>>
>> ...Takumi
>>
-------------- next part --------------
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index ac87e76..cb2fc4a 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3165,7 +3165,7 @@ PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee,
   // registers.
   if (isVarArg) {
     Chain = DAG.getNode(seenFloatArg ? PPCISD::CR6SET : PPCISD::CR6UNSET,
-                        dl, DAG.getVTList(MVT::Other, MVT::Glue), Chain);
+                        dl, DAG.getVTList(MVT::Other, MVT::Glue), Chain, InFlag);
     InFlag = Chain.getValue(1);
   }