[llvm-commits] [FIX+regression-test] PR13617: LLVM+Clang emits movw instrucionts with -march=armv6zk

[Stepan Dyatkovskiy]

Hi all!

The bug is fired when dag-to-dag isel meets 'add' instruction with 
second operand that is negative number less than -256. E.g.:
add %var, -1000

ARM dag-to-dag instruction selector matches the pattern that emits
(sub %var (MOVi16 Rd, 1000))

After fast TableGen learning, I found that it ignores instruction 
predicates for patterns (ARMPat, ARMV6Pat and so on) while generating 
MatcherTable. So it ignores restrictions defined for MOVi16 instruction 
(ARMv6t2 and higher).

I also found that for several patterns this behaviour compensated by 
adding 'Requires' predicate explicitly. So, I did the same in this 
patch. Please find the patch in attachment for review.

-Stepan.
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