[llvm-commits] [llvm] r162821 - /llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

[Andrew Trick]

Author: atrick
Date: Tue Aug 28 20:58:55 2012
New Revision: 162821

URL: http://llvm.org/viewvc/llvm-project?rev=162821&view=rev
Log:
Fix ARM vector copies of overlapping register tuples.

I have tested the fix, but have not been successfull in generating
a robust unit test. This can only be exposed through particular
register assignments.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=162821&r1=162820&r2=162821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Aug 28 20:58:55 2012
@@ -710,10 +710,23 @@
 
   const TargetRegisterInfo *TRI = &getRegisterInfo();
   MachineInstrBuilder Mov;
+
+  // Copy register tuples backward when the first Dest reg overlaps with SrcReg.
+  if (TRI->regsOverlap(SrcReg, TRI->getSubReg(DestReg, BeginIdx))) {
+    BeginIdx = BeginIdx + ((SubRegs-1)*Spacing);
+    Spacing = -Spacing;
+  }
+#ifndef NDEBUG
+  SmallSet<unsigned, 4> DstRegs;
+#endif
   for (unsigned i = 0; i != SubRegs; ++i) {
     unsigned Dst = TRI->getSubReg(DestReg, BeginIdx + i*Spacing);
     unsigned Src = TRI->getSubReg(SrcReg,  BeginIdx + i*Spacing);
     assert(Dst && Src && "Bad sub-register");
+#ifndef NDEBUG
+    DstRegs.insert(Dst);
+    assert(!DstRegs.count(Src) && "destructive vector copy");
+#endif
     Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst)
       .addReg(Src);
     // VORR takes two source operands.