[llvm-commits] [PATCH 3/6] Optimize zext on PPC64

Tobias von Koch tobias.von.koch at gmail.com
Wed Aug 22 03:11:31 PDT 2012

Dear all,

This is part of a series of patches for the PowerPC backend to improve
support for Freescale processors.

Please review and commit if this is OK - I don't have commit access.


Description of patch:

zeroextend IR instruction is lowered to an 'and' node with an immediate
mask operand, which in turn gets legalised to a sequence of ori's & ands.
This can be done more efficiently using the rldicl  instruction.
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