[llvm-commits] [llvm] r162306 - in /llvm/trunk: include/llvm/MC/MCTargetAsmParser.h lib/Target/X86/AsmParser/X86AsmParser.cpp
Chad Rosier
mcrosier at apple.com
Tue Aug 21 12:37:00 PDT 2012
Author: mcrosier
Date: Tue Aug 21 14:36:59 2012
New Revision: 162306
URL: http://llvm.org/viewvc/llvm-project?rev=162306&view=rev
Log:
[ms-inline asm] Do not report a Parser error when matching inline assembly.
Modified:
llvm/trunk/include/llvm/MC/MCTargetAsmParser.h
llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
Modified: llvm/trunk/include/llvm/MC/MCTargetAsmParser.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCTargetAsmParser.h?rev=162306&r1=162305&r2=162306&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCTargetAsmParser.h (original)
+++ llvm/trunk/include/llvm/MC/MCTargetAsmParser.h Tue Aug 21 14:36:59 2012
@@ -89,7 +89,8 @@
MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts,
- unsigned &OrigErrorInfo) {
+ unsigned &OrigErrorInfo,
+ bool matchingInlineAsm = false) {
OrigErrorInfo = ~0x0;
return true;
}
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=162306&r1=162305&r2=162306&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Aug 21 14:36:59 2012
@@ -39,7 +39,9 @@
MCAsmLexer &getLexer() const { return Parser.getLexer(); }
bool Error(SMLoc L, const Twine &Msg,
- ArrayRef<SMRange> Ranges = ArrayRef<SMRange>()) {
+ ArrayRef<SMRange> Ranges = ArrayRef<SMRange>(),
+ bool matchingInlineAsm = false) {
+ if (matchingInlineAsm) return true;
return Parser.Error(L, Msg, Ranges);
}
@@ -68,7 +70,8 @@
bool MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts,
- unsigned &OrigErrorInfo);
+ unsigned &OrigErrorInfo,
+ bool matchingInlineAsm = false);
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
/// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode.
@@ -1525,11 +1528,12 @@
bool X86AsmParser::
MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- SmallVectorImpl<MCInst> &MCInsts,
- unsigned &OrigErrorInfo) {
+ SmallVectorImpl<MCInst> &MCInsts, unsigned &OrigErrorInfo,
+ bool matchingInlineAsm) {
assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
+ ArrayRef<SMRange> EmptyRanges = ArrayRef<SMRange>();
// First, handle aliases that expand to multiple instructions.
// FIXME: This should be replaced with a real .td file alias mechanism.
@@ -1578,10 +1582,12 @@
MCInsts.push_back(Inst);
return false;
case Match_MissingFeature:
- Error(IDLoc, "instruction requires a CPU feature not currently enabled");
+ Error(IDLoc, "instruction requires a CPU feature not currently enabled",
+ EmptyRanges, matchingInlineAsm);
return true;
case Match_ConversionFail:
- return Error(IDLoc, "unable to convert operands to instruction");
+ return Error(IDLoc, "unable to convert operands to instruction",
+ EmptyRanges, matchingInlineAsm);
case Match_InvalidOperand:
WasOriginallyInvalidOperand = true;
break;
@@ -1660,7 +1666,7 @@
OS << "'" << Base << MatchChars[i] << "'";
}
OS << ")";
- Error(IDLoc, OS.str());
+ Error(IDLoc, OS.str(), EmptyRanges, matchingInlineAsm);
return true;
}
@@ -1672,30 +1678,33 @@
(Match3 == Match_MnemonicFail) && (Match4 == Match_MnemonicFail)) {
if (!WasOriginallyInvalidOperand) {
return Error(IDLoc, "invalid instruction mnemonic '" + Base + "'",
- Op->getLocRange());
+ Op->getLocRange(), matchingInlineAsm);
}
// Recover location info for the operand if we know which was the problem.
if (OrigErrorInfo != ~0U) {
if (OrigErrorInfo >= Operands.size())
- return Error(IDLoc, "too few operands for instruction");
+ return Error(IDLoc, "too few operands for instruction",
+ EmptyRanges, matchingInlineAsm);
X86Operand *Operand = (X86Operand*)Operands[OrigErrorInfo];
if (Operand->getStartLoc().isValid()) {
SMRange OperandRange = Operand->getLocRange();
return Error(Operand->getStartLoc(), "invalid operand for instruction",
- OperandRange);
+ OperandRange, matchingInlineAsm);
}
}
- return Error(IDLoc, "invalid operand for instruction");
+ return Error(IDLoc, "invalid operand for instruction", EmptyRanges,
+ matchingInlineAsm);
}
// If one instruction matched with a missing feature, report this as a
// missing feature.
if ((Match1 == Match_MissingFeature) + (Match2 == Match_MissingFeature) +
(Match3 == Match_MissingFeature) + (Match4 == Match_MissingFeature) == 1){
- Error(IDLoc, "instruction requires a CPU feature not currently enabled");
+ Error(IDLoc, "instruction requires a CPU feature not currently enabled",
+ EmptyRanges, matchingInlineAsm);
return true;
}
@@ -1703,12 +1712,14 @@
// operand failure.
if ((Match1 == Match_InvalidOperand) + (Match2 == Match_InvalidOperand) +
(Match3 == Match_InvalidOperand) + (Match4 == Match_InvalidOperand) == 1){
- Error(IDLoc, "invalid operand for instruction");
+ Error(IDLoc, "invalid operand for instruction", EmptyRanges,
+ matchingInlineAsm);
return true;
}
// If all of these were an outright failure, report it in a useless way.
- Error(IDLoc, "unknown use of instruction mnemonic without a size suffix");
+ Error(IDLoc, "unknown use of instruction mnemonic without a size suffix",
+ EmptyRanges, matchingInlineAsm);
return true;
}
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