[llvm-commits] [llvm] r161768 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp test/CodeGen/ARM/arm-modifier.ll
Eric Christopher
echristo at apple.com
Mon Aug 13 11:18:52 PDT 2012
Author: echristo
Date: Mon Aug 13 13:18:52 2012
New Revision: 161768
URL: http://llvm.org/viewvc/llvm-project?rev=161768&view=rev
Log:
Add support for the %H output modifier.
Patch by Weiming Zhao.
Modified:
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/trunk/test/CodeGen/ARM/arm-modifier.ll
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=161768&r1=161767&r2=161768&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Aug 13 13:18:52 2012
@@ -529,10 +529,23 @@
return false;
}
- // These modifiers are not yet supported.
+ // This modifier is not yet supported.
case 'h': // A range of VFP/NEON registers suitable for VLD1/VST1.
- case 'H': // The highest-numbered register of a pair.
return true;
+ case 'H': // The highest-numbered register of a pair.
+ const MachineOperand &MO = MI->getOperand(OpNum);
+ if (!MO.isReg())
+ return true;
+ const TargetRegisterClass &RC = ARM::GPRRegClass;
+ const MachineFunction &MF = *MI->getParent()->getParent();
+ const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
+
+ unsigned RegIdx = TRI->getEncodingValue(MO.getReg());
+ RegIdx |= 1; //The odd register is also the higher-numbered one of a pair.
+
+ unsigned Reg = RC.getRegister(RegIdx);
+ O << ARMInstPrinter::getRegisterName(Reg);
+ return false;
}
}
Modified: llvm/trunk/test/CodeGen/ARM/arm-modifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-modifier.ll?rev=161768&r1=161767&r2=161768&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-modifier.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arm-modifier.ll Mon Aug 13 13:18:52 2012
@@ -57,3 +57,12 @@
store i64 %1, i64* @f3_var, align 4
ret void
}
+
+define i64 @f4(i64* %val) nounwind {
+entry:
+ ;CHECK: f4
+ ;CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], {{r[0-9]?[13579]}}, [r0]
+ ;CHECK: mov r0, [[REG1]]
+ %0 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [$1]", "=&r,r,*Qo"(i64* %val, i64* %val) nounwind
+ ret i64 %0
+}
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