[llvm-commits] [llvm] r161634 - in /llvm/trunk: include/llvm/CodeGen/MachineRegisterInfo.h lib/CodeGen/MachineRegisterInfo.cpp test/CodeGen/X86/apm.ll test/CodeGen/X86/xor.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Thu Aug 9 15:49:46 PDT 2012
Author: stoklund
Date: Thu Aug 9 17:49:46 2012
New Revision: 161634
URL: http://llvm.org/viewvc/llvm-project?rev=161634&view=rev
Log:
Partition use lists so defs always come before uses.
This makes it possible to speed up def_iterator by stopping at the first
use. This makes def_empty() and getUniqueVRegDef() much faster when
there are many uses.
In a +Asserts build, LiveVariables is 100x faster in one case because
getVRegDef() has an assertion that would scan to the end of a
def_iterator chain.
Spill weight calculation is significantly faster (300x in one case)
because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP)
which calls def_empty(%RIP).
Modified:
llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
llvm/trunk/test/CodeGen/X86/apm.ll
llvm/trunk/test/CodeGen/X86/xor.ll
Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=161634&r1=161633&r2=161634&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Thu Aug 9 17:49:46 2012
@@ -513,11 +513,20 @@
assert(Op && "Cannot increment end iterator!");
Op = getNextOperandForReg(Op);
- // If this is an operand we don't care about, skip it.
- while (Op && ((!ReturnUses && Op->isUse()) ||
- (!ReturnDefs && Op->isDef()) ||
- (SkipDebug && Op->isDebug())))
- Op = getNextOperandForReg(Op);
+ // All defs come before the uses, so stop def_iterator early.
+ if (!ReturnUses) {
+ if (Op) {
+ if (Op->isUse())
+ Op = 0;
+ else
+ assert(!Op->isDebug() && "Can't have debug defs");
+ }
+ } else {
+ // If this is an operand we don't care about, skip it.
+ while (Op && ((!ReturnDefs && Op->isDef()) ||
+ (SkipDebug && Op->isDebug())))
+ Op = getNextOperandForReg(Op);
+ }
return *this;
}
Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=161634&r1=161633&r2=161634&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Thu Aug 9 17:49:46 2012
@@ -144,9 +144,17 @@
Head->Contents.Reg.Prev = MO;
MO->Contents.Reg.Prev = Last;
- // Insert at the front.
- MO->Contents.Reg.Next = Head;
- HeadRef = MO;
+ // Def operands always precede uses. This allows def_iterator to stop early.
+ // Insert def operands at the front, and use operands at the back.
+ if (MO->isDef()) {
+ // Insert def at the front.
+ MO->Contents.Reg.Next = Head;
+ HeadRef = MO;
+ } else {
+ // Insert use at the end.
+ MO->Contents.Reg.Next = 0;
+ Last->Contents.Reg.Next = MO;
+ }
}
/// Remove MO from its use-def list.
Modified: llvm/trunk/test/CodeGen/X86/apm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/apm.ll?rev=161634&r1=161633&r2=161634&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/apm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/apm.ll Thu Aug 9 17:49:46 2012
@@ -3,8 +3,8 @@
; PR8573
; CHECK: foo:
-; CHECK: movl %esi, %ecx
-; CHECK-NEXT: leaq (%rdi), %rax
+; CHECK: leaq (%rdi), %rax
+; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: monitor
; WIN64: foo:
; WIN64: leaq (%rcx), %rax
Modified: llvm/trunk/test/CodeGen/X86/xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xor.ll?rev=161634&r1=161633&r2=161634&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xor.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xor.ll Thu Aug 9 17:49:46 2012
@@ -31,7 +31,7 @@
; X64: test3:
; X64: notl
; X64: andl
-; X64: shrl %eax
+; X64: shrl
; X64: ret
; X32: test3:
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