[llvm-commits] [llvm] r161607 - in /llvm/trunk: lib/Target/Mips/Mips64InstrInfo.td test/MC/Mips/sext_64_32.ll

[Jack Carter]

Author: jacksprat
Date: Thu Aug  9 14:43:18 2012
New Revision: 161607

URL: http://llvm.org/viewvc/llvm-project?rev=161607&view=rev
Log:
Another 32 to 64 bit sign extension bug.

The fields in the td definition were switched.

Modified:
    llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
    llvm/trunk/test/MC/Mips/sext_64_32.ll

Modified: llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td?rev=161607&r1=161606&r2=161607&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td Thu Aug  9 14:43:18 2012
@@ -220,7 +220,7 @@
 def DINS : InsBase<7, "dins", CPU64Regs>;
 
 let isCodeGenOnly = 1, rs = 0, shamt = 0 in {
-  def DSLL64_32 : FR<0x3c, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
+  def DSLL64_32 : FR<0x00, 0x3c, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
                      "dsll\t$rd, $rt, 32", [], IIAlu>;
   def SLL64_32 : FR<0x0, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
                     "sll\t$rd, $rt, 0", [], IIAlu>;

Modified: llvm/trunk/test/MC/Mips/sext_64_32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/sext_64_32.ll?rev=161607&r1=161606&r2=161607&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/sext_64_32.ll (original)
+++ llvm/trunk/test/MC/Mips/sext_64_32.ll Thu Aug  9 14:43:18 2012
@@ -4,12 +4,17 @@
 
 ; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0
 
-; ModuleID = '../sext.c'
-;target datalayout = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v64:64:64-n32"
-;target triple = "mips64el-unknown-linux"
-
 define i64 @foo(i32 %ival) nounwind readnone {
 entry:
   %conv = sext i32 %ival to i64
   ret i64 %conv
 }
+
+; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 0
+
+define i64 @foo_2(i32 %ival_2) nounwind readnone {
+entry:
+  %conv_2 = zext i32 %ival_2 to i64
+  ret i64 %conv_2
+}
+