[llvm-commits] [llvm] r161428 - /llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td

[Hal Finkel]

Author: hfinkel
Date: Tue Aug  7 12:04:20 2012
New Revision: 161428

URL: http://llvm.org/viewvc/llvm-project?rev=161428&view=rev
Log:
Add a comment about mftb vs. mfspr on PPC.

Thanks to Alex Rosenberg for the suggestion.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=161428&r1=161427&r2=161428&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Tue Aug  7 12:04:20 2012
@@ -269,6 +269,10 @@
 def MFTB8 : XFXForm_1_ext<31, 339, 268, (outs G8RC:$rT), (ins),
                           "mfspr $rT, 268", SprMFTB>,
             PPC970_DGroup_First, PPC970_Unit_FXU;
+// Note that encoding mftb using mfspr is now the preferred form,
+// and has been since at least ISA v2.03. The mftb instruction has
+// now been phased out. Using mfspr, however, is known not to work on
+// the POWER3.
 
 let Defs = [X1], Uses = [X1] in
 def DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi),"",