[llvm-commits] [llvm] r161370 - /llvm/trunk/lib/Target/X86/X86Subtarget.cpp

[Andrew Trick]

Author: atrick
Date: Mon Aug  6 19:25:30 2012
New Revision: 161370

URL: http://llvm.org/viewvc/llvm-project?rev=161370&view=rev
Log:
Allow x86 subtargets to use the GenericModel defined in X86Schedule.td.

This allows codegen passes to query properties like
InstrItins->SchedModel->IssueWidth. It also ensure's that
computeOperandLatency returns the X86 defaults for loads and "high
latency ops". This should have no significant impact on existing
schedulers because X86 defaults happen to be the same as global
defaults.

Modified:
    llvm/trunk/lib/Target/X86/X86Subtarget.cpp

Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=161370&r1=161369&r2=161370&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Mon Aug  6 19:25:30 2012
@@ -397,10 +397,10 @@
     }
   }
 
-  if (X86ProcFamily == IntelAtom) {
+  if (X86ProcFamily == IntelAtom)
     PostRAScheduler = true;
-    InstrItins = getInstrItineraryForCPU(CPUName);
-  }
+
+  InstrItins = getInstrItineraryForCPU(CPUName);
 
   // It's important to keep the MCSubtargetInfo feature bits in sync with
   // target data structure which is shared with MC code emitter, etc.