[llvm-commits] [llvm] r161074 - in /llvm/trunk/lib/CodeGen: MachineTraceMetrics.cpp MachineTraceMetrics.h

[Andrew Trick]

On Jul 31, 2012, at 1:44 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
> +    if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
> +      HasPhysRegs = true;
> +      continue;
> +    }
> +    // Collect virtual register reads.
> +    if (!MO->readsReg())
> +      continue;
> +    MachineRegisterInfo::def_iterator DefI = MRI->def_begin(Reg);
> +    DataDep Dep;
> +    Dep.DefMI = &*DefI;
> +    Dep.DefOp = DefI.getOperandNo();
> +    Dep.UseOp = MO.getOperandNo();
> +    Deps.push_back(Dep);

The SSA assumption should be explicit. Can we change getVRegDef to return MachineOperand?

> +    /// Minimum number of cycles from this instruction is issued to the of the
> +    /// trace, as determined by data dependencies and instruction latencies.
> +    unsigned Height;
> +  };

This requires a different technique of course. It's nice if uses can "push" uses' heights to their SSA defs. But that requires that the use knows it is in the def's preferred downward trace, which you might not.

I'm guessing you're just going to walk over all vreg uses filtering those that are in the def's preferred downward trace and recurse on phis.

Things get even more interesting when you try to derive slack (= CricitalPath - Height - Depth) for instructions. It doesn't look like you have enough info yet to estimate cross block dependencies out of the current trace predecessor and into the current trace successor to get the current critical path (or upper bound).

-Andy