[llvm-commits] [llvm] r160749 - in /llvm/trunk: lib/CodeGen/TwoAddressInstructionPass.cpp test/CodeGen/X86/cmov.ll test/CodeGen/X86/jump_sign.ll test/CodeGen/X86/select.ll
Manman Ren
mren at apple.com
Wed Jul 25 12:23:08 PDT 2012
The updated testing case X86/select.ll breaks clang-atom. I am taking a look, sorry about that.
Thanks,
Manman
On Jul 25, 2012, at 11:28 AM, Manman Ren wrote:
> Author: mren
> Date: Wed Jul 25 13:28:13 2012
> New Revision: 160749
>
> URL: http://llvm.org/viewvc/llvm-project?rev=160749&view=rev
> Log:
> Disable rematerialization in TwoAddressInstructionPass.
>
> It is redundant; RegisterCoalescer will do the remat if it can't eliminate
> the copy. Collected instruction counts before and after this. A few extra
> instructions are generated due to spilling but it is normal to see these kinds
> of changes with almost any small codegen change, according to Jakob.
>
> This also fixed rdar://11830760 where xor is expected instead of movi0.
>
> Modified:
> llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
> llvm/trunk/test/CodeGen/X86/cmov.ll
> llvm/trunk/test/CodeGen/X86/jump_sign.ll
> llvm/trunk/test/CodeGen/X86/select.ll
>
> Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=160749&r1=160748&r2=160749&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
> +++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Wed Jul 25 13:28:13 2012
> @@ -55,7 +55,6 @@
> STATISTIC(NumAggrCommuted , "Number of instructions aggressively commuted");
> STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
> STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk");
> -STATISTIC(NumReMats, "Number of instructions re-materialized");
> STATISTIC(NumDeletes, "Number of dead instructions deleted");
> STATISTIC(NumReSchedUps, "Number of instructions re-scheduled up");
> STATISTIC(NumReSchedDowns, "Number of instructions re-scheduled down");
> @@ -92,10 +91,6 @@
> unsigned Reg,
> MachineBasicBlock::iterator OldPos);
>
> - bool isProfitableToReMat(unsigned Reg, const TargetRegisterClass *RC,
> - MachineInstr *MI, MachineInstr *DefMI,
> - MachineBasicBlock *MBB, unsigned Loc);
> -
> bool NoUseAfterLastDef(unsigned Reg, MachineBasicBlock *MBB, unsigned Dist,
> unsigned &LastDef);
>
> @@ -301,55 +296,6 @@
> return true;
> }
>
> -/// isTwoAddrUse - Return true if the specified MI is using the specified
> -/// register as a two-address operand.
> -static bool isTwoAddrUse(MachineInstr *UseMI, unsigned Reg) {
> - const MCInstrDesc &MCID = UseMI->getDesc();
> - for (unsigned i = 0, e = MCID.getNumOperands(); i != e; ++i) {
> - MachineOperand &MO = UseMI->getOperand(i);
> - if (MO.isReg() && MO.getReg() == Reg &&
> - (MO.isDef() || UseMI->isRegTiedToDefOperand(i)))
> - // Earlier use is a two-address one.
> - return true;
> - }
> - return false;
> -}
> -
> -/// isProfitableToReMat - Return true if the heuristics determines it is likely
> -/// to be profitable to re-materialize the definition of Reg rather than copy
> -/// the register.
> -bool
> -TwoAddressInstructionPass::isProfitableToReMat(unsigned Reg,
> - const TargetRegisterClass *RC,
> - MachineInstr *MI, MachineInstr *DefMI,
> - MachineBasicBlock *MBB, unsigned Loc) {
> - bool OtherUse = false;
> - for (MachineRegisterInfo::use_nodbg_iterator UI = MRI->use_nodbg_begin(Reg),
> - UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
> - MachineOperand &UseMO = UI.getOperand();
> - MachineInstr *UseMI = UseMO.getParent();
> - MachineBasicBlock *UseMBB = UseMI->getParent();
> - if (UseMBB == MBB) {
> - DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
> - if (DI != DistanceMap.end() && DI->second == Loc)
> - continue; // Current use.
> - OtherUse = true;
> - // There is at least one other use in the MBB that will clobber the
> - // register.
> - if (isTwoAddrUse(UseMI, Reg))
> - return true;
> - }
> - }
> -
> - // If other uses in MBB are not two-address uses, then don't remat.
> - if (OtherUse)
> - return false;
> -
> - // No other uses in the same block, remat if it's defined in the same
> - // block so it does not unnecessarily extend the live range.
> - return MBB == DefMI->getParent();
> -}
> -
> /// NoUseAfterLastDef - Return true if there are no intervening uses between the
> /// last instruction in the MBB that defines the specified register and the
> /// two-address instruction which is being processed. It also returns the last
> @@ -538,7 +484,7 @@
> }
>
>
> -/// isProfitableToReMat - Return true if it's potentially profitable to commute
> +/// isProfitableToCommute - Return true if it's potentially profitable to commute
> /// the two-address instruction that's being processed.
> bool
> TwoAddressInstructionPass::isProfitableToCommute(unsigned regA, unsigned regB,
> @@ -1518,26 +1464,9 @@
> mi->getOperand(i).getReg() != regA);
> #endif
>
> - // Emit a copy or rematerialize the definition.
> - bool isCopy = false;
> - const TargetRegisterClass *rc = MRI->getRegClass(regB);
> - MachineInstr *DefMI = MRI->getUniqueVRegDef(regB);
> - // If it's safe and profitable, remat the definition instead of
> - // copying it.
> - if (DefMI &&
> - DefMI->isAsCheapAsAMove() &&
> - DefMI->isSafeToReMat(TII, AA, regB) &&
> - isProfitableToReMat(regB, rc, mi, DefMI, mbbi, Dist)){
> - DEBUG(dbgs() << "2addr: REMATTING : " << *DefMI << "\n");
> - unsigned regASubIdx = mi->getOperand(DstIdx).getSubReg();
> - TII->reMaterialize(*mbbi, mi, regA, regASubIdx, DefMI, *TRI);
> - ReMatRegs.set(TargetRegisterInfo::virtReg2Index(regB));
> - ++NumReMats;
> - } else {
> - BuildMI(*mbbi, mi, mi->getDebugLoc(), TII->get(TargetOpcode::COPY),
> - regA).addReg(regB);
> - isCopy = true;
> - }
> + // Emit a copy.
> + BuildMI(*mbbi, mi, mi->getDebugLoc(), TII->get(TargetOpcode::COPY),
> + regA).addReg(regB);
>
> // Update DistanceMap.
> MachineBasicBlock::iterator prevMI = prior(mi);
> @@ -1561,9 +1490,8 @@
>
> MO.setReg(regA);
>
> - if (isCopy)
> - // Propagate SrcRegMap.
> - SrcRegMap[regA] = regB;
> + // Propagate SrcRegMap.
> + SrcRegMap[regA] = regB;
> }
>
> if (AllUsesCopied) {
>
> Modified: llvm/trunk/test/CodeGen/X86/cmov.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmov.ll?rev=160749&r1=160748&r2=160749&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/cmov.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/cmov.ll Wed Jul 25 13:28:13 2012
> @@ -4,8 +4,8 @@
> define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
> entry:
> ; CHECK: test1:
> -; CHECK: btl
> -; CHECK-NEXT: movl $12, %eax
> +; CHECK: movl $12, %eax
> +; CHECK-NEXT: btl
> ; CHECK-NEXT: cmovael (%rcx), %eax
> ; CHECK-NEXT: ret
>
> @@ -19,8 +19,8 @@
> define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
> entry:
> ; CHECK: test2:
> -; CHECK: btl
> -; CHECK-NEXT: movl $12, %eax
> +; CHECK: movl $12, %eax
> +; CHECK-NEXT: btl
> ; CHECK-NEXT: cmovbl (%rcx), %eax
> ; CHECK-NEXT: ret
>
>
> Modified: llvm/trunk/test/CodeGen/X86/jump_sign.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/jump_sign.ll?rev=160749&r1=160748&r2=160749&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/jump_sign.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/jump_sign.ll Wed Jul 25 13:28:13 2012
> @@ -142,6 +142,7 @@
> define i32 @l4(i32 %a, i32 %b) nounwind {
> entry:
> ; CHECK: l4:
> +; CHECK: xor
> ; CHECK: sub
> ; CHECK-NOT: cmp
> %cmp = icmp sgt i32 %b, %a
>
> Modified: llvm/trunk/test/CodeGen/X86/select.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select.ll?rev=160749&r1=160748&r2=160749&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/select.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/select.ll Wed Jul 25 13:28:13 2012
> @@ -189,8 +189,8 @@
> %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone
> ret i8* %call
> ; CHECK: test12:
> -; CHECK: mulq
> ; CHECK: movq $-1, %rdi
> +; CHECK: mulq
> ; CHECK: cmovnoq %rax, %rdi
> ; CHECK: jmp __Znam
> }
>
>
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