[llvm-commits] [llvm] r160129 - in /llvm/trunk/test/CodeGen/X86: constant-pool-sharing.ll ctpop-combine.ll store_op_load_fold2.ll vec_shuffle-38.ll xor.ll

[Nadav Rotem]

Author: nadav
Date: Thu Jul 12 08:45:15 2012
New Revision: 160129

URL: http://llvm.org/viewvc/llvm-project?rev=160129&view=rev
Log:
The LIT tests below do not specify the exact cpu model and fail on AVX2 machines, because we select different instructions such as vbroadcast, new shuffles, etc.
Patch by Michael Liao.


Modified:
    llvm/trunk/test/CodeGen/X86/constant-pool-sharing.ll
    llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
    llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll
    llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll
    llvm/trunk/test/CodeGen/X86/xor.ll

Modified: llvm/trunk/test/CodeGen/X86/constant-pool-sharing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-sharing.ll?rev=160129&r1=160128&r2=160129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constant-pool-sharing.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constant-pool-sharing.ll Thu Jul 12 08:45:15 2012
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck %s
 
 ; llc should share constant pool entries between this integer vector
 ; and this floating-point vector since they have the same encoding.

Modified: llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ctpop-combine.ll?rev=160129&r1=160128&r2=160129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ctpop-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ctpop-combine.ll Thu Jul 12 08:45:15 2012
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s
 
 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
 

Modified: llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll?rev=160129&r1=160128&r2=160129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store_op_load_fold2.ll Thu Jul 12 08:45:15 2012
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT
-; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL
+; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT
+; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL
 
 target datalayout = "e-p:32:32"
         %struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll?rev=160129&r1=160128&r2=160129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-38.ll Thu Jul 12 08:45:15 2012
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
 
 define <2 x double> @ld(<2 x double> %p) nounwind optsize ssp {
 ; CHECK: unpcklpd

Modified: llvm/trunk/test/CodeGen/X86/xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xor.ll?rev=160129&r1=160128&r2=160129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xor.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xor.ll Thu Jul 12 08:45:15 2012
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2  | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse2  | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
 
 ; Though it is undefined, we want xor undef,undef to produce zero.
 define <4 x i32> @test1() nounwind {