[llvm-commits] [dragonegg] r160126 - in /dragonegg/trunk: include/x86/dragonegg/Target.h src/x86/Target.cpp src/x86/x86_builtins test/validator/c/rdrand-builtins.c
Duncan Sands
baldrick at free.fr
Thu Jul 12 04:40:57 PDT 2012
Author: baldrick
Date: Thu Jul 12 06:40:57 2012
New Revision: 160126
URL: http://llvm.org/viewvc/llvm-project?rev=160126&view=rev
Log:
Add support for rdrand builtins. One issue here is that gcc-4.5 doesn't
support them. To conditionalize on this I moved LLVM_SET_SUBTARGET_FEATURES
to Target.cpp. Since dragonegg is entirely written in C++ this kind of thing
should really just be done using proper C++ classes rather than imitating them
using macros, but that's a task for another day.
Added:
dragonegg/trunk/test/validator/c/rdrand-builtins.c
Modified:
dragonegg/trunk/include/x86/dragonegg/Target.h
dragonegg/trunk/src/x86/Target.cpp
dragonegg/trunk/src/x86/x86_builtins
Modified: dragonegg/trunk/include/x86/dragonegg/Target.h
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/include/x86/dragonegg/Target.h?rev=160126&r1=160125&r2=160126&view=diff
==============================================================================
--- dragonegg/trunk/include/x86/dragonegg/Target.h (original)
+++ dragonegg/trunk/include/x86/dragonegg/Target.h Thu Jul 12 06:40:57 2012
@@ -23,6 +23,10 @@
#ifndef DRAGONEGG_TARGET_H
#define DRAGONEGG_TARGET_H
+namespace llvm {
+class SubtargetFeatures;
+}
+
/* LLVM specific stuff for supporting calling convention output */
#define TARGET_ADJUST_LLVM_CC(CC, type) \
{ \
@@ -268,97 +272,10 @@
/* Turn -march=xx into a CPU type.
*/
+extern void llvm_x86_set_subtarget_features(std::string &C,
+ llvm::SubtargetFeatures &F);
#define LLVM_SET_SUBTARGET_FEATURES(C, F) \
- { if (TARGET_MACHO && ! strcmp (ix86_arch_string, "apple")) \
- C = TARGET_64BIT ? "core2" : "yonah"; \
- else \
- C = ix86_arch_string; \
- \
- if (TARGET_64BIT) \
- F.AddFeature("64bit"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_64BIT) \
- F.AddFeature("64bit", false); \
- \
- if (TARGET_3DNOW) \
- F.AddFeature("3dnow"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW) \
- F.AddFeature("3dnow", false); \
- \
- if (TARGET_3DNOW_A) \
- F.AddFeature("3dnowa"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW_A) \
- F.AddFeature("3dnowa", false); \
- \
- if (TARGET_AES) \
- F.AddFeature("aes"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_AES) \
- F.AddFeature("aes", false); \
- \
- if (TARGET_AVX) \
- F.AddFeature("avx"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_AVX) \
- F.AddFeature("avx", false); \
- \
- if (TARGET_CMPXCHG16B) \
- F.AddFeature("cmpxchg16b"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_CX16) \
- F.AddFeature("cmpxchg16b", false); \
- \
- if (TARGET_FMA) \
- F.AddFeature("fma"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_FMA) \
- F.AddFeature("fma", false); \
- \
- if (TARGET_FMA4) \
- F.AddFeature("fma4"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_FMA4) \
- F.AddFeature("fma4", false); \
- \
- if (TARGET_MMX) \
- F.AddFeature("mmx"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_MMX) \
- F.AddFeature("mmx", false); \
- \
- if (TARGET_POPCNT) \
- F.AddFeature("popcnt"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_POPCNT) \
- F.AddFeature("popcnt", false); \
- \
- if (TARGET_SSE) \
- F.AddFeature("sse"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE) \
- F.AddFeature("sse", false); \
- \
- if (TARGET_SSE2) \
- F.AddFeature("sse2"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE2) \
- F.AddFeature("sse2", false); \
- \
- if (TARGET_SSE3) \
- F.AddFeature("sse3"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE3) \
- F.AddFeature("sse3", false); \
- \
- if (TARGET_SSE4_1) \
- F.AddFeature("sse41"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_1) \
- F.AddFeature("sse41", false); \
- \
- if (TARGET_SSE4_2) \
- F.AddFeature("sse42"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_2) \
- F.AddFeature("sse42", false); \
- \
- if (TARGET_SSE4A) \
- F.AddFeature("sse4a"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE4A) \
- F.AddFeature("sse4a", false); \
- \
- if (TARGET_SSSE3) \
- F.AddFeature("ssse3"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSSE3) \
- F.AddFeature("ssse3", false); \
- }
+ llvm_x86_set_subtarget_features(C, F)
#define LLVM_SET_IMPLICIT_FLOAT(flag_no_implicit_float) \
if (!TARGET_80387) \
Modified: dragonegg/trunk/src/x86/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/src/x86/Target.cpp?rev=160126&r1=160125&r2=160126&view=diff
==============================================================================
--- dragonegg/trunk/src/x86/Target.cpp (original)
+++ dragonegg/trunk/src/x86/Target.cpp Thu Jul 12 06:40:57 2012
@@ -26,6 +26,7 @@
// LLVM headers
#include "llvm/Module.h"
+#include "llvm/MC/SubtargetFeature.h"
// System headers
#include <gmp.h>
@@ -939,6 +940,25 @@
Result = Builder.CreateCall2(cttz, Result, Builder.getTrue());
return true;
}
+ case rdrand16_step:
+ case rdrand32_step:
+ case rdrand64_step: {
+ Intrinsic::ID ID;
+ if (Handler == rdrand16_step)
+ ID = Intrinsic::x86_rdrand_16;
+ else if (Handler == rdrand32_step)
+ ID = Intrinsic::x86_rdrand_32;
+ else {
+ assert(Handler == rdrand64_step && "Unexpected rdrand builtin!");
+ ID = Intrinsic::x86_rdrand_64;
+ }
+
+ Function *rdrand = Intrinsic::getDeclaration(TheModule, ID);
+ Value *Call = Builder.CreateCall(rdrand);
+ Builder.CreateStore(Builder.CreateExtractValue(Call, 0), Ops[0]);
+ Result = Builder.CreateExtractValue(Call, 1);
+ return true;
+ }
}
llvm_unreachable("Forgot case for code?");
}
@@ -1832,3 +1852,103 @@
return "";
#endif
}
+
+void llvm_x86_set_subtarget_features(std::string &C,
+ llvm::SubtargetFeatures &F) {
+ if (TARGET_MACHO && ! strcmp (ix86_arch_string, "apple"))
+ C = TARGET_64BIT ? "core2" : "yonah";
+ else
+ C = ix86_arch_string;
+
+ if (TARGET_64BIT)
+ F.AddFeature("64bit");
+ else if (target_flags_explicit & OPTION_MASK_ISA_64BIT)
+ F.AddFeature("64bit", false);
+
+ if (TARGET_3DNOW)
+ F.AddFeature("3dnow");
+ else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW)
+ F.AddFeature("3dnow", false);
+
+ if (TARGET_3DNOW_A)
+ F.AddFeature("3dnowa");
+ else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW_A)
+ F.AddFeature("3dnowa", false);
+
+ if (TARGET_AES)
+ F.AddFeature("aes");
+ else if (target_flags_explicit & OPTION_MASK_ISA_AES)
+ F.AddFeature("aes", false);
+
+ if (TARGET_AVX)
+ F.AddFeature("avx");
+ else if (target_flags_explicit & OPTION_MASK_ISA_AVX)
+ F.AddFeature("avx", false);
+
+ if (TARGET_CMPXCHG16B)
+ F.AddFeature("cmpxchg16b");
+ else if (target_flags_explicit & OPTION_MASK_ISA_CX16)
+ F.AddFeature("cmpxchg16b", false);
+
+ if (TARGET_FMA)
+ F.AddFeature("fma");
+ else if (target_flags_explicit & OPTION_MASK_ISA_FMA)
+ F.AddFeature("fma", false);
+
+ if (TARGET_FMA4)
+ F.AddFeature("fma4");
+ else if (target_flags_explicit & OPTION_MASK_ISA_FMA4)
+ F.AddFeature("fma4", false);
+
+ if (TARGET_MMX)
+ F.AddFeature("mmx");
+ else if (target_flags_explicit & OPTION_MASK_ISA_MMX)
+ F.AddFeature("mmx", false);
+
+ if (TARGET_POPCNT)
+ F.AddFeature("popcnt");
+ else if (target_flags_explicit & OPTION_MASK_ISA_POPCNT)
+ F.AddFeature("popcnt", false);
+
+#ifdef TARGET_RDRND
+ if (TARGET_RDRND)
+ F.AddFeature("rdrand");
+ else if (target_flags_explicit & OPTION_MASK_ISA_RDRND)
+ F.AddFeature("rdrand", false);
+#endif
+
+ if (TARGET_SSE)
+ F.AddFeature("sse");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE)
+ F.AddFeature("sse", false);
+
+ if (TARGET_SSE2)
+ F.AddFeature("sse2");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE2)
+ F.AddFeature("sse2", false);
+
+ if (TARGET_SSE3)
+ F.AddFeature("sse3");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE3)
+ F.AddFeature("sse3", false);
+
+ if (TARGET_SSE4_1)
+ F.AddFeature("sse41");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_1)
+ F.AddFeature("sse41", false);
+
+ if (TARGET_SSE4_2)
+ F.AddFeature("sse42");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_2)
+ F.AddFeature("sse42", false);
+
+ if (TARGET_SSE4A)
+ F.AddFeature("sse4a");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE4A)
+ F.AddFeature("sse4a", false);
+
+ if (TARGET_SSSE3)
+ F.AddFeature("ssse3");
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSSE3)
+ F.AddFeature("ssse3", false);
+}
Modified: dragonegg/trunk/src/x86/x86_builtins
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/src/x86/x86_builtins?rev=160126&r1=160125&r2=160126&view=diff
==============================================================================
--- dragonegg/trunk/src/x86/x86_builtins (original)
+++ dragonegg/trunk/src/x86/x86_builtins Thu Jul 12 06:40:57 2012
@@ -697,9 +697,9 @@
//DEFINE_BUILTIN(rdgsbase32),
//DEFINE_BUILTIN(rdgsbase64),
//DEFINE_BUILTIN(rdpmc),
-//DEFINE_BUILTIN(rdrand16_step),
-//DEFINE_BUILTIN(rdrand32_step),
-//DEFINE_BUILTIN(rdrand64_step),
+DEFINE_BUILTIN(rdrand16_step),
+DEFINE_BUILTIN(rdrand32_step),
+DEFINE_BUILTIN(rdrand64_step),
//DEFINE_BUILTIN(rdtsc),
//DEFINE_BUILTIN(rdtscp),
//DEFINE_BUILTIN(rintpd),
Added: dragonegg/trunk/test/validator/c/rdrand-builtins.c
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/test/validator/c/rdrand-builtins.c?rev=160126&view=auto
==============================================================================
--- dragonegg/trunk/test/validator/c/rdrand-builtins.c (added)
+++ dragonegg/trunk/test/validator/c/rdrand-builtins.c Thu Jul 12 06:40:57 2012
@@ -0,0 +1,25 @@
+// RUN: %dragonegg -S %s -o - -mrdrnd | FileCheck %s
+// XFAIL: gcc-4.5
+
+#include <immintrin.h>
+
+int rdrand16(unsigned short *p) {
+ return _rdrand16_step(p);
+// CHECK: @rdrand16
+// CHECK: call { i16, i32 } @llvm.x86.rdrand.16
+// CHECK: store i16
+}
+
+int rdrand32(unsigned *p) {
+ return _rdrand32_step(p);
+// CHECK: @rdrand32
+// CHECK: call { i32, i32 } @llvm.x86.rdrand.32
+// CHECK: store i32
+}
+
+int rdrand64(unsigned long long *p) {
+ return _rdrand64_step(p);
+// CHECK: @rdrand64
+// CHECK: call { i64, i32 } @llvm.x86.rdrand.64
+// CHECK: store i64
+}
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