[llvm-commits] [llvm] r159957 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/ARM/select.ll
Peter Cooper
peter_cooper at apple.com
Tue Jul 10 19:12:07 PDT 2012
Hi Akira
This is because an i1 value of 1 is all ones which is actually a -1 if you think about it as signed and then convert using sint. A uint conversion would give a 1.0 value.
Pete
On Jul 10, 2012, at 5:36 PM, Akira Hatanaka <ahatanak at gmail.com> wrote:
> Owen,
>
> Could you explain why "-1.0" is selected instead of "1.0" here?
>
> // fold (sint_to_fp (setcc x, y, cc)) -> (select_cc x, y, -1.0, 0.0,, cc)
>
> An expression in my test program is evaluating to -3.2 instead of the expected value -1.2. I haven't confirmed this yet, but it looks like it would be correct if "1.0" were selected.
>
> Does this have anything to do with setBooleanContents?
> For mips this is set to "ZeroOrOneBooleanContent".
>
> On Mon, Jul 9, 2012 at 1:31 PM, Owen Anderson <resistor at mac.com> wrote:
> Author: resistor
> Date: Mon Jul 9 15:31:12 2012
> New Revision: 159957
>
> URL: http://llvm.org/viewvc/llvm-project?rev=159957&view=rev
> Log:
> Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional move, since there are only two possible values.
> Previously, this would become an integer extension operation, followed by a real integer->float conversion.
>
> Modified:
> llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> llvm/trunk/test/CodeGen/ARM/select.ll
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=159957&r1=159956&r2=159957&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Jul 9 15:31:12 2012
> @@ -5974,6 +5974,30 @@
> return DAG.getNode(ISD::UINT_TO_FP, N->getDebugLoc(), VT, N0);
> }
>
> + // fold (sint_to_fp (setcc x, y, cc)) -> (select_cc x, y, -1.0, 0.0,, cc)
> + if (N0.getOpcode() == ISD::SETCC && !VT.isVector() &&
> + (!LegalOperations ||
> + TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT))) {
> + SDValue Ops[] =
> + { N0.getOperand(0), N0.getOperand(1),
> + DAG.getConstantFP(-1.0, VT) , DAG.getConstantFP(0.0, VT),
> + N0.getOperand(2) };
> + return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), VT, Ops, 5);
> + }
> +
> + // fold (sint_to_fp (zext (setcc x, y, cc))) ->
> + // (select_cc x, y, 1.0, 0.0,, cc)
> + if (N0.getOpcode() == ISD::ZERO_EXTEND &&
> + N0.getOperand(0).getOpcode() == ISD::SETCC &&!VT.isVector() &&
> + (!LegalOperations ||
> + TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT))) {
> + SDValue Ops[] =
> + { N0.getOperand(0).getOperand(0), N0.getOperand(0).getOperand(1),
> + DAG.getConstantFP(1.0, VT) , DAG.getConstantFP(0.0, VT),
> + N0.getOperand(0).getOperand(2) };
> + return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), VT, Ops, 5);
> + }
> +
> return SDValue();
> }
>
> @@ -5999,6 +6023,18 @@
> return DAG.getNode(ISD::SINT_TO_FP, N->getDebugLoc(), VT, N0);
> }
>
> + // fold (uint_to_fp (setcc x, y, cc)) -> (select_cc x, y, -1.0, 0.0,, cc)
> + if (N0.getOpcode() == ISD::SETCC && !VT.isVector() &&
> + (!LegalOperations ||
> + TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT))) {
> + SDValue Ops[] =
> + { N0.getOperand(0), N0.getOperand(1),
> + DAG.getConstantFP(1.0, VT), DAG.getConstantFP(0.0, VT),
> + N0.getOperand(2) };
> + return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), VT, Ops, 5);
> + }
> +
> +
> return SDValue();
> }
>
>
> Modified: llvm/trunk/test/CodeGen/ARM/select.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select.ll?rev=159957&r1=159956&r2=159957&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/select.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/select.ll Mon Jul 9 15:31:12 2012
> @@ -113,3 +113,29 @@
> call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, [2 x i32], i32, float)*)(i8* undef, i8* undef, [2 x i32] %tmp493, i32 0, float 1.000000e+00) optsize
> ret void
> }
> +
> +; CHECK: f10
> +define float @f10(i32 %a, i32 %b) nounwind uwtable readnone ssp {
> +; CHECK-NOT: floatsisf
> + %1 = icmp eq i32 %a, %b
> + %2 = zext i1 %1 to i32
> + %3 = sitofp i32 %2 to float
> + ret float %3
> +}
> +
> +; CHECK: f11
> +define float @f11(i32 %a, i32 %b) nounwind uwtable readnone ssp {
> +; CHECK-NOT: floatsisf
> + %1 = icmp eq i32 %a, %b
> + %2 = sitofp i1 %1 to float
> + ret float %2
> +}
> +
> +; CHECK: f12
> +define float @f12(i32 %a, i32 %b) nounwind uwtable readnone ssp {
> +; CHECK-NOT: floatunsisf
> + %1 = icmp eq i32 %a, %b
> + %2 = uitofp i1 %1 to float
> + ret float %2
> +}
> +
>
>
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