[llvm-commits] [llvm] r159509 - in /llvm/trunk: lib/CodeGen/RegisterCoalescer.cpp test/CodeGen/ARM/pr13249.ll
Rafael Espindola
rafael.espindola at gmail.com
Sun Jul 1 10:08:01 PDT 2012
Author: rafael
Date: Sun Jul 1 12:08:01 2012
New Revision: 159509
URL: http://llvm.org/viewvc/llvm-project?rev=159509&view=rev
Log:
Now that RegistersDefinedFromSameValue handles one instruction being an
implicit_def, the other instruction can be anything, including instructions
that define multiple values. Be careful about that and don't assume what operand
0 is.
Fixes pr13249.
Added:
llvm/trunk/test/CodeGen/ARM/pr13249.ll
Modified:
llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
Modified: llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=159509&r1=159508&r2=159509&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp Sun Jul 1 12:08:01 2012
@@ -1175,28 +1175,18 @@
if (!MI || CP.isPartial() || CP.isPhys())
return false;
- unsigned Dst = MI->getOperand(0).getReg();
- if (!TargetRegisterInfo::isVirtualRegister(Dst))
+ unsigned A = CP.getDstReg();
+ if (!TargetRegisterInfo::isVirtualRegister(A))
return false;
- unsigned A = CP.getDstReg();
unsigned B = CP.getSrcReg();
-
- if (B == Dst)
- std::swap(A, B);
- assert(Dst == A);
+ if (!TargetRegisterInfo::isVirtualRegister(B))
+ return false;
MachineInstr *OtherMI = li.getInstructionFromIndex(OtherVNI->def);
-
if (!OtherMI)
return false;
- unsigned OtherDst = OtherMI->getOperand(0).getReg();
- if (!TargetRegisterInfo::isVirtualRegister(OtherDst))
- return false;
-
- assert(OtherDst == B);
-
if (MI->isImplicitDef()) {
DupCopies.push_back(MI);
return true;
Added: llvm/trunk/test/CodeGen/ARM/pr13249.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/pr13249.ll?rev=159509&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/pr13249.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/pr13249.ll Sun Jul 1 12:08:01 2012
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple armv7--linux-gnueabi
+
+define arm_aapcscc i8* @__strtok_r_1c(i8* %arg, i8 signext %arg1, i8** nocapture %arg2) nounwind {
+bb:
+ br label %bb3
+
+bb3: ; preds = %bb3, %bb
+ %tmp = phi i8* [ %tmp5, %bb3 ], [ %arg, %bb ]
+ %tmp4 = load i8* %tmp, align 1
+ %tmp5 = getelementptr inbounds i8* %tmp, i32 1
+ br i1 undef, label %bb3, label %bb7
+
+bb7: ; preds = %bb13, %bb3
+ %tmp8 = phi i8 [ %tmp14, %bb13 ], [ %tmp4, %bb3 ]
+ %tmp9 = phi i8* [ %tmp12, %bb13 ], [ %tmp, %bb3 ]
+ %tmp10 = icmp ne i8 %tmp8, %arg1
+ %tmp12 = getelementptr inbounds i8* %tmp9, i32 1
+ br i1 %tmp10, label %bb13, label %bb15
+
+bb13: ; preds = %bb7
+ %tmp14 = load i8* %tmp12, align 1
+ br label %bb7
+
+bb15: ; preds = %bb7
+ store i8* %tmp9, i8** %arg2, align 4
+ ret i8* %tmp
+}
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