[llvm-commits] [llvm] r159409 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/tls-pie.ll

Rafael Espindola rafael.espindola at gmail.com
Thu Jun 28 21:22:36 PDT 2012


Author: rafael
Date: Thu Jun 28 23:22:35 2012
New Revision: 159409

URL: http://llvm.org/viewvc/llvm-project?rev=159409&view=rev
Log:
In the initial exec mode we always do a load to find the address of a variable.
Before this patch in pic 32 bit code we would add the global base register
and not load from that address. This is a really old bug, but before the
introduction of the tls attributes we would never select initial exec for
pic code.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/tls-pie.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=159409&r1=159408&r2=159409&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jun 28 23:22:35 2012
@@ -7451,11 +7451,11 @@
       Offset = DAG.getNode(ISD::ADD, dl, PtrVT,
                           DAG.getNode(X86ISD::GlobalBaseReg, DebugLoc(), PtrVT),
                            Offset);
-    } else {
-      Offset = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Offset,
-                           MachinePointerInfo::getGOT(), false, false, false,
-                           0);
     }
+
+    Offset = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Offset,
+                         MachinePointerInfo::getGOT(), false, false, false,
+                         0);
   }
 
   // The address of the thread local variable is the add of the thread

Modified: llvm/trunk/test/CodeGen/X86/tls-pie.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-pie.ll?rev=159409&r1=159408&r2=159409&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-pie.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-pie.ll Thu Jun 28 23:22:35 2012
@@ -40,7 +40,8 @@
 ; X32-NEXT: popl %eax
 ; X32-NEXT: .Ltmp{{[0-9]+}}:
 ; X32-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp{{[0-9]+}}-.L{{[0-9]+}}$pb), %eax
-; X32-NEXT: movl %gs:i2 at GOTNTPOFF(%eax), %eax
+; X32-NEXT: movl i2 at GOTNTPOFF(%eax), %eax
+; X32-NEXT: movl %gs:(%eax), %eax
 ; X32-NEXT: ret
 ; X64: f3:
 ; X64:      movq i2 at GOTTPOFF(%rip), %rax
@@ -56,11 +57,11 @@
 ; X32: f4:
 ; X32:      calll .L{{[0-9]+}}$pb
 ; X32-NEXT: .L{{[0-9]+}}$pb:
-; X32-NEXT: popl %eax
+; X32-NEXT: popl %ecx
 ; X32-NEXT: .Ltmp{{[0-9]+}}:
-; X32-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp{{[0-9]+}}-.L{{[0-9]+}}$pb), %eax
-; X32-NEXT: leal i2 at GOTNTPOFF(%eax), %eax
-; X32-NEXT: addl %gs:0, %eax
+; X32-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp{{[0-9]+}}-.L{{[0-9]+}}$pb), %ecx
+; X32-NEXT: movl %gs:0, %eax
+; X32-NEXT: addl i2 at GOTNTPOFF(%ecx), %eax
 ; X32-NEXT: ret
 ; X64: f4:
 ; X64:      movq %fs:0, %rax





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