[llvm-commits] [llvm] r159324 - in /llvm/trunk: lib/Target/Mips/MipsAsmPrinter.cpp test/CodeGen/Mips/inlineasm-operand-code.ll
Jack Carter
jcarter at mips.com
Wed Jun 27 18:33:40 PDT 2012
Author: jacksprat
Date: Wed Jun 27 20:33:40 2012
New Revision: 159324
URL: http://llvm.org/viewvc/llvm-project?rev=159324&view=rev
Log:
The Mips specific inline asm operand modifier 'z' has the
following description in the gnu sources:
Print $0 if operand is zero otherwise print the op normally.
Modified:
llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll
Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=159324&r1=159323&r2=159324&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Jun 27 20:33:40 2012
@@ -323,6 +323,17 @@
return true;
O << MO.getImm() - 1;
return false;
+ case 'z': // $0 if zero, regular printing otherwise
+ {
+ if (MO.getType() != MachineOperand::MO_Immediate)
+ return true;
+ int64_t Val = MO.getImm();
+ if (Val)
+ O << Val;
+ else
+ O << "$0";
+ return false;
+ }
}
}
@@ -335,11 +346,12 @@
const char *ExtraCode,
raw_ostream &O) {
if (ExtraCode && ExtraCode[0])
- return true; // Unknown modifier.
+ return true; // Unknown modifier.
const MachineOperand &MO = MI->getOperand(OpNum);
assert(MO.isReg() && "unexpected inline asm memory operand");
O << "0($" << MipsInstPrinter::getRegisterName(MO.getReg()) << ")";
+
return false;
}
Modified: llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll?rev=159324&r1=159323&r2=159324&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll Wed Jun 27 20:33:40 2012
@@ -29,5 +29,17 @@
;CHECK: #NO_APP
tail call i32 asm sideeffect "addi $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) nounwind
+; z with -3
+;CHECK: #APP
+;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-3
+;CHECK: #NO_APP
+ tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 -3) nounwind
+
+; z with 0
+;CHECK: #APP
+;CHECK: addi ${{[0-9]+}},${{[0-9]+}},$0
+;CHECK: #NO_APP
+ tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
+
ret i32 0
}
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