[llvm-commits] [llvm] r158577 - /llvm/trunk/lib/CodeGen/RegAllocBasic.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Fri Jun 15 18:48:48 2012
New Revision: 158577

URL: http://llvm.org/viewvc/llvm-project?rev=158577&view=rev
Log:
Remove final verification in RABasic.

We now have a proper machine code verifier pass between register
allocation and rewriting.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocBasic.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=158577&r1=158576&r2=158577&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Fri Jun 15 18:48:48 2012
@@ -314,26 +314,6 @@
   // optional HTML output
   DEBUG(RMF->renderMachineFunction("After basic register allocation.", VRM));
 
-  // FIXME: Verification currently must run before VirtRegRewriter. We should
-  // make the rewriter a separate pass and override verifyAnalysis instead. When
-  // that happens, verification naturally falls under VerifyMachineCode.
-#ifndef NDEBUG
-  if (VerifyEnabled) {
-    // Verify accuracy of LiveIntervals. The standard machine code verifier
-    // ensures that each LiveIntervals covers all uses of the virtual reg.
-
-    // FIXME: MachineVerifier is badly broken when using the standard
-    // spiller. Always use -spiller=inline with -verify-regalloc. Even with the
-    // inline spiller, some tests fail to verify because the coalescer does not
-    // always generate verifiable code.
-    MF->verify(this, "In RABasic::verify");
-
-    // Verify that LiveIntervals are partitioned into unions and disjoint within
-    // the unions.
-    verify();
-  }
-#endif // !NDEBUG
-
   releaseMemory();
   return true;
 }