[llvm-commits] [llvm] r158537 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

[Andrew Trick]

On Jun 15, 2012, at 1:30 PM, Chandler Carruth <chandlerc at google.com> wrote:

> On Fri, Jun 15, 2012 at 1:07 PM, Andrew Trick <atrick at apple.com> wrote:
> Author: atrick
> Date: Fri Jun 15 15:07:29 2012
> New Revision: 158537
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=158537&view=rev
> Log:
> LSR: fix expansion of scaled reg in non-address type formulae.
> 
> For non-address users, Base and Scaled registers are not specially
> associated to fit an address mode, so SCEVExpander should apply normal
> expansion rules. Otherwise we may sink computation into inner loops
> that have already been optimized.
> 
> Test case possible?

Not yet. Or at least I can't think of a way.

There are things we can do to improve the situation a bit:
llvm.org/pr13122 Need unit test driver for codegen IR passes.

-Andy

>  
> 
> Modified:
>    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
> 
> Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=158537&r1=158536&r2=158537&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Fri Jun 15 15:07:29 2012
> @@ -4268,13 +4268,6 @@
>     Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, 0, IP)));
>   }
> 
> -  // Flush the operand list to suppress SCEVExpander hoisting.
> -  if (!Ops.empty()) {
> -    Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
> -    Ops.clear();
> -    Ops.push_back(SE.getUnknown(FullV));
> -  }
> -
>   // Expand the ScaledReg portion.
>   Value *ICmpScaledV = 0;
>   if (F.AM.Scale != 0) {
> @@ -4296,23 +4289,34 @@
>     } else {
>       // Otherwise just expand the scaled register and an explicit scale,
>       // which is expected to be matched as part of the address.
> +
> +      // Flush the operand list to suppress SCEVExpander hoisting address modes.
> +      if (!Ops.empty() && LU.Kind == LSRUse::Address) {
> +        Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
> +        Ops.clear();
> +        Ops.push_back(SE.getUnknown(FullV));
> +      }
>       ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, 0, IP));
>       ScaledS = SE.getMulExpr(ScaledS,
>                               SE.getConstant(ScaledS->getType(), F.AM.Scale));
>       Ops.push_back(ScaledS);
> -
> -      // Flush the operand list to suppress SCEVExpander hoisting.
> -      Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
> -      Ops.clear();
> -      Ops.push_back(SE.getUnknown(FullV));
>     }
>   }
> 
>   // Expand the GV portion.
>   if (F.AM.BaseGV) {
> +    // Flush the operand list to suppress SCEVExpander hoisting.
> +    if (!Ops.empty()) {
> +      Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
> +      Ops.clear();
> +      Ops.push_back(SE.getUnknown(FullV));
> +    }
>     Ops.push_back(SE.getUnknown(F.AM.BaseGV));
> +  }
> 
> -    // Flush the operand list to suppress SCEVExpander hoisting.
> +  // Flush the operand list to suppress SCEVExpander hoisting of both folded and
> +  // unfolded offsets. LSR assumes they both live next to their uses.
> +  if (!Ops.empty()) {
>     Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
>     Ops.clear();
>     Ops.push_back(SE.getUnknown(FullV));
> 
> 
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