[llvm-commits] [llvm] r158527 - in /llvm/trunk: lib/Target/ARM/ARMExpandPseudoInsts.cpp test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Fri Jun 15 10:46:55 PDT 2012
Author: stoklund
Date: Fri Jun 15 12:46:54 2012
New Revision: 158527
URL: http://llvm.org/viewvc/llvm-project?rev=158527&view=rev
Log:
Preserve <undef> flags in ARMExpandPseudo.
This probably mostly shows up in bugpoint-generated code.
Modified:
llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/trunk/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll
Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=158527&r1=158526&r2=158527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Fri Jun 15 12:46:54 2012
@@ -459,22 +459,23 @@
MIB.addOperand(MI.getOperand(OpIdx++));
bool SrcIsKill = MI.getOperand(OpIdx).isKill();
+ bool SrcIsUndef = MI.getOperand(OpIdx).isUndef();
unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
unsigned D0, D1, D2, D3;
GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3);
- MIB.addReg(D0);
+ MIB.addReg(D0, getUndefRegState(SrcIsUndef));
if (NumRegs > 1 && TableEntry->copyAllListRegs)
- MIB.addReg(D1);
+ MIB.addReg(D1, getUndefRegState(SrcIsUndef));
if (NumRegs > 2 && TableEntry->copyAllListRegs)
- MIB.addReg(D2);
+ MIB.addReg(D2, getUndefRegState(SrcIsUndef));
if (NumRegs > 3 && TableEntry->copyAllListRegs)
- MIB.addReg(D3);
+ MIB.addReg(D3, getUndefRegState(SrcIsUndef));
// Copy the predicate operands.
MIB.addOperand(MI.getOperand(OpIdx++));
MIB.addOperand(MI.getOperand(OpIdx++));
- if (SrcIsKill) // Add an implicit kill for the super-reg.
+ if (SrcIsKill && !SrcIsUndef) // Add an implicit kill for the super-reg.
MIB->addRegisterKilled(SrcReg, TRI, true);
TransferImpOps(MI, MIB, MIB);
Modified: llvm/trunk/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll?rev=158527&r1=158526&r2=158527&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll Fri Jun 15 12:46:54 2012
@@ -60,8 +60,16 @@
ret void
}
+; Check that pseudo-expansion preserves <undef> flags.
+define void @foo3(i8* %p) nounwind ssp {
+entry:
+ tail call void @llvm.arm.neon.vst2.v4f32(i8* %p, <4 x float> undef, <4 x float> undef, i32 4)
+ ret void
+}
+
declare arm_aapcs_vfpcc void @bar(i8*, float, float, float)
declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
+declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind
!0 = metadata !{metadata !"omnipotent char", metadata !1}
!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
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