[llvm-commits] [llvm] r158414 - in /llvm/trunk: lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsISelLowering.h test/CodeGen/Mips/memcpy.ll

[Akira Hatanaka]

Author: ahatanak
Date: Wed Jun 13 14:33:32 2012
New Revision: 158414

URL: http://llvm.org/viewvc/llvm-project?rev=158414&view=rev
Log:
Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.

Added:
    llvm/trunk/test/CodeGen/Mips/memcpy.ll
Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.h

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=158414&r1=158413&r2=158414&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Wed Jun 13 14:33:32 2012
@@ -303,6 +303,8 @@
 
   setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0);
   setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1);
+
+  maxStoresPerMemcpy = 16;
 }
 
 bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const {
@@ -3455,6 +3457,16 @@
   return false;
 }
 
+EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
+                                            unsigned SrcAlign, bool IsZeroVal,
+                                            bool MemcpyStrSrc,
+                                            MachineFunction &MF) const {
+  if (Subtarget->hasMips64())
+    return MVT::i64;
+
+  return MVT::i32;
+}
+
 bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
   if (VT != MVT::f32 && VT != MVT::f64)
     return false;

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=158414&r1=158413&r2=158414&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Wed Jun 13 14:33:32 2012
@@ -195,6 +195,11 @@
 
     virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
 
+    virtual EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
+                                    unsigned SrcAlign, bool IsZeroVal,
+                                    bool MemcpyStrSrc,
+                                    MachineFunction &MF) const;
+
     /// isFPImmLegal - Returns true if the target can instruction select the
     /// specified FP immediate natively. If false, the legalizer will
     /// materialize the FP immediate as a load from a constant pool.

Added: llvm/trunk/test/CodeGen/Mips/memcpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/memcpy.ll?rev=158414&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/memcpy.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/memcpy.ll Wed Jun 13 14:33:32 2012
@@ -0,0 +1,19 @@
+; RUN: llc -march=mipsel < %s | FileCheck %s 
+
+%struct.S1 = type { i32, [41 x i8] }
+
+ at .str = private unnamed_addr constant [31 x i8] c"abcdefghijklmnopqrstuvwxyzABCD\00", align 1
+
+define void @foo1(%struct.S1* %s1, i8 signext %n) nounwind {
+entry:
+; CHECK-NOT: call16(memcpy
+
+  %arraydecay = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 0
+  tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %arraydecay, i8* getelementptr inbounds ([31 x i8]* @.str, i32 0, i32 0), i32 31, i32 1, i1 false)
+  %arrayidx = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 40
+  store i8 %n, i8* %arrayidx, align 1
+  ret void
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
+