[llvm-commits] [llvm] r158328 - /llvm/trunk/test/CodeGen/ARM/str_pre-2.ll

[Jakob Stoklund Olesen]

Author: stoklund
Date: Mon Jun 11 16:14:28 2012
New Revision: 158328

URL: http://llvm.org/viewvc/llvm-project?rev=158328&view=rev
Log:
Fix test that depends on register allocation.

The test is really checking the prolog/epilog load/store multiple
formation.

Modified:
    llvm/trunk/test/CodeGen/ARM/str_pre-2.ll

Modified: llvm/trunk/test/CodeGen/ARM/str_pre-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/str_pre-2.ll?rev=158328&r1=158327&r2=158328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/str_pre-2.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/str_pre-2.ll Mon Jun 11 16:14:28 2012
@@ -1,13 +1,12 @@
-; RUN: llc < %s -mtriple=armv6-linux-gnu -regalloc=basic | FileCheck %s
-
-; The greedy register allocator uses a single CSR here, invalidating the test.
+; RUN: llc < %s -mtriple=armv6-linux-gnu | FileCheck %s
 
 @b = external global i64*
 
 define i64 @t(i64 %a) nounwind readonly {
 entry:
-; CHECK: push {lr}
-; CHECK: pop {lr}
+; CHECK: push {r4, r5, lr}
+; CHECK: pop {r4, r5, pc}
+        call void asm sideeffect "", "~{r4},~{r5}"() nounwind
 	%0 = load i64** @b, align 4
 	%1 = load i64* %0, align 4
 	%2 = mul i64 %1, %a