[llvm-commits] [llvm] r158283 - in /llvm/trunk: lib/Target/PowerPC/PPCInstr64Bit.td test/CodeGen/PowerPC/ctrloops.ll

Hal Finkel hfinkel at anl.gov
Sat Jun 9 15:10:20 PDT 2012


Author: hfinkel
Date: Sat Jun  9 17:10:19 2012
New Revision: 158283

URL: http://llvm.org/viewvc/llvm-project?rev=158283&view=rev
Log:
Improve ext/trunc patterns on PPC64.

The PPC64 backend had patterns for i32 <-> i64 extensions and truncations that
would leave self-moves in the final assembly. Replacing those patterns with ones
based on the SUBREG builtins yields better-looking code.

Thanks to Jakob and Owen for their suggestions in this matter.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
    llvm/trunk/test/CodeGen/PowerPC/ctrloops.ll

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=158283&r1=158282&r2=158283&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Sat Jun  9 17:10:19 2012
@@ -287,14 +287,6 @@
 
 let PPC970_Unit = 1 in {  // FXU Operations.
 
-// Copies, extends, truncates.
-def OR4To8  : XForm_6<31, 444, (outs G8RC:$rA), (ins GPRC:$rS, GPRC:$rB),
-                   "or $rA, $rS, $rB", IntGeneral,
-                   []>;
-def OR8To4  : XForm_6<31, 444, (outs GPRC:$rA), (ins G8RC:$rS, G8RC:$rB),
-                   "or $rA, $rS, $rB", IntGeneral,
-                   []>;
-
 def LI8  : DForm_2_r0<14, (outs G8RC:$rD), (ins symbolLo64:$imm),
                       "li $rD, $imm", IntGeneral,
                       [(set G8RC:$rD, immSExt16:$imm)]>;
@@ -726,11 +718,12 @@
 
 // Extensions and truncates to/from 32-bit regs.
 def : Pat<(i64 (zext GPRC:$in)),
-          (RLDICL (OR4To8 GPRC:$in, GPRC:$in), 0, 32)>;
+          (RLDICL (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPRC:$in, sub_32),
+                  0, 32)>;
 def : Pat<(i64 (anyext GPRC:$in)),
-          (OR4To8 GPRC:$in, GPRC:$in)>;
+          (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPRC:$in, sub_32)>;
 def : Pat<(i32 (trunc G8RC:$in)),
-          (OR8To4 G8RC:$in, G8RC:$in)>;
+          (EXTRACT_SUBREG G8RC:$in, sub_32)>;
 
 // Extending loads with i64 targets.
 def : Pat<(zextloadi1 iaddr:$src),

Modified: llvm/trunk/test/CodeGen/PowerPC/ctrloops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ctrloops.ll?rev=158283&r1=158282&r2=158283&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ctrloops.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/ctrloops.ll Sat Jun  9 17:10:19 2012
@@ -20,6 +20,7 @@
 for.end:                                          ; preds = %for.body
   ret void
 ; CHECK: @test1
+; CHECK-NOT: or 3, 3, 3
 ; CHECK: mtctr
 ; CHECK-NOT: addi
 ; CHECK-NOT: cmplwi





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