[llvm-commits] [llvm] r158055 - in /llvm/trunk: lib/Target/ARM/Disassembler/ARMDisassembler.cpp test/MC/Disassembler/ARM/thumb1.txt
Richard Barton
richard.barton at arm.com
Wed Jun 6 02:12:53 PDT 2012
Author: rbarton
Date: Wed Jun 6 04:12:53 2012
New Revision: 158055
URL: http://llvm.org/viewvc/llvm-project?rev=158055&view=rev
Log:
Correct decoder for T1 conditional B encoding
Modified:
llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt
Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=158055&r1=158054&r2=158055&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Jun 6 04:12:53 2012
@@ -3463,9 +3463,9 @@
static DecodeStatus
DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder){
- if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<8>(Val<<1) + 4,
+ if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<9>(Val<<1) + 4,
true, 2, Inst, Decoder))
- Inst.addOperand(MCOperand::CreateImm(SignExtend32<8>(Val << 1)));
+ Inst.addOperand(MCOperand::CreateImm(SignExtend32<9>(Val << 1)));
return MCDisassembler::Success;
}
Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt?rev=158055&r1=158054&r2=158055&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb1.txt Wed Jun 6 04:12:53 2012
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -triple=thumbv6-apple-darwin -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=thumbv6-apple-darwin -disassemble -show-encoding < %s | FileCheck %s
#------------------------------------------------------------------------------
# ADC (register)
@@ -83,6 +83,15 @@
0xb1 0x43
#------------------------------------------------------------------------------
+# B
+#------------------------------------------------------------------------------
+# CHECK: bls #128 @ encoding: [0x40,0xd9]
+# CHECK: beq #-256 @ encoding: [0x80,0xd0]
+
+0x40 0xd9
+0x80 0xd0
+
+#------------------------------------------------------------------------------
# BKPT
#------------------------------------------------------------------------------
# CHECK: bkpt #0
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