[llvm-commits] Review Request: ARM Thumb2 bi

[Eli Friedman]

On Mon, Jun 4, 2012 at 10:57 AM, Joel Jones <joel_k_jones at apple.com> wrote:
> This change handles a another case for generating the bic instruction when a compile time constant is known.  This occurs when implicitly zero extending function arguments from 16 bits to 32 bits.
>
> Index: test/CodeGen/ARM/bicZext.ll
> ===================================================================
> --- test/CodeGen/ARM/bicZext.ll (revision 0)
> +++ test/CodeGen/ARM/bicZext.ll (revision 0)
> @@ -0,0 +1,19 @@
> +; RUN: llc %s -o - | FileCheck %s
> +; ModuleID = 'bic.c'
> +target triple = "thumbv7-apple-ios3.0.0"
> +
> +define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp {
> +entry:
> +  ; CHECK: .thumb_func _foo16
> +  ; CHECK: {{bic[^#]*#3}}
> +  %and = and i16 %f, -4
> +  ret i16 %and
> +}
> +
> +define i32 @foo32(i32 %f) nounwind readnone optsize ssp {
> +entry:
> +  ; CHECK: .thumb_func _foo32
> +  ; CHECK: {{bic[^#]*#3}}
> +  %and = and i32 %f, -4
> +  ret i32 %and
> +}
> Index: lib/Target/ARM/ARMInstrThumb2.td
> ===================================================================
> --- lib/Target/ARM/ARMInstrThumb2.td    (revision 157726)
> +++ lib/Target/ARM/ARMInstrThumb2.td    (working copy)
> @@ -62,6 +62,14 @@
>   return CurDAG->getTargetConstant(-((int)N->getZExtValue()), MVT::i32);
>  }]>;
>
> +// so_imm_notSext_XFORM - Return a so_imm value packed into the format
> +// described for so_imm_notSext def below.
> +def t2_so_imm_notSext_XFORM : SDNodeXForm<imm, [{
> +  APInt apIntN = N->getAPIntValue();
> +  unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue();
> +  return CurDAG->getTargetConstant(~N16bitSignExt, MVT::i32);
> +}]>;
> +
>  // t2_so_imm - Match a 32-bit immediate operand, which is an
>  // 8-bit immediate rotated by an arbitrary number of bits, or an 8-bit
>  // immediate splatted into multiple bytes of the word.
> @@ -86,6 +94,15 @@
>   let ParserMatchClass = t2_so_imm_not_asmoperand;
>  }
>
> +def t2_so_imm_notSext : Operand<i32>, PatLeaf<(imm), [{
> +    APInt apIntN = N->getAPIntValue();
> +    if (!apIntN.isIntN(16)) return false;
> +    unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue();
> +    return ARM_AM::getT2SOImmVal(~N16bitSignExt) != -1;
> +  }], t2_so_imm_notSext_XFORM> {
> +  let ParserMatchClass = t2_so_imm_not_asmoperand;
> +}
> +
>  // t2_so_imm_neg - Match an immediate that is a negation of a t2_so_imm.
>  def t2_so_imm_neg_asmoperand : AsmOperandClass { let Name = "T2SOImmNeg"; }
>  def t2_so_imm_neg : Operand<i32>, PatLeaf<(imm), [{
> @@ -2332,6 +2349,11 @@
>  def : T2Pat<(and     rGPR:$src, t2_so_imm_not:$imm),
>             (t2BICri rGPR:$src, t2_so_imm_not:$imm)>;
>
> +// so_imm_notSext is needed instead of so_imm_not, as the value of imm
> +// will match the original bitWidth for $src.
> +def : T2Pat<(and rGPR:$src, t2_so_imm_notSext:$imm),
> +            (t2BICri rGPR:$src, t2_so_imm_notSext:$imm)>;

Err, isn't this missing a restriction on the LHS?  You can't
arbitrarily transform (x & 0xFFFC) to (x & 0xFFFFFFFC).

-Eli